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KVM: PPC: Book3S: Facilities to save/restore XICS presentation ctrler state
This adds the ability for userspace to save and restore the state of the XICS interrupt presentation controllers (ICPs) via the KVM_GET/SET_ONE_REG interface. Since there is one ICP per vcpu, we simply define a new 64-bit register in the ONE_REG space for the ICP state. The state includes the CPU priority setting, the pending IPI priority, and the priority and source number of any pending external interrupt. Signed-off-by: Paul Mackerras <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
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@ -1808,6 +1808,7 @@ registers, find a list below:
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PPC | KVM_REG_PPC_TLB2PS | 32
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PPC | KVM_REG_PPC_TLB3PS | 32
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PPC | KVM_REG_PPC_EPTCFG | 32
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PPC | KVM_REG_PPC_ICP_STATE | 64
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ARM registers are mapped using the lower 32 bits. The upper 16 of that
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is the register group type, or coprocessor number:
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