A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-13 16:16:15 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge "ASoC: msm-dai-q6-v2: Add separate cpu dais for mi2s rx and tx"

Browse source
This commit is contained in:
qctecmdr 2021-10-05 04:06:29 -07:00 • committed by Gerrit - the friendly Code Review server
commit 8bd92fad2d
2 changed files with 246 additions and 210 deletions
Download patch file Download diff file Expand all files Collapse all files

406
asoc/msm-dai-q6-v2.c
View file

@ -341,8 +341,7 @@ struct msm_dai_q6_mi2s_dai_config {
struct msm_dai_q6_mi2s_dai_data {
u32 is_island_dai;
struct msm_dai_q6_mi2s_dai_config tx_dai;
struct msm_dai_q6_mi2s_dai_config rx_dai;
struct msm_dai_q6_mi2s_dai_config mi2s_dai;
};
struct msm_dai_q6_meta_mi2s_dai_data {
@ -5818,71 +5817,55 @@ static int msm_dai_q6_dai_mi2s_probe(struct snd_soc_dai *dai)
u16 dai_id = 0;
dai->id = mi2s_pdata->intf_id;
if (mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.channel_mode) {
if (dai->id == MSM_PRIM_MI2S)
if (mi2s_dai_data->mi2s_dai.mi2s_dai_data.port_config.i2s.channel_mode) {
if (dai->id == MSM_PRIM_MI2S_RX)
ctrl = &mi2s_config_controls[0];
if (dai->id == MSM_SEC_MI2S)
if (dai->id == MSM_SEC_MI2S_RX)
ctrl = &mi2s_config_controls[1];
if (dai->id == MSM_TERT_MI2S)
if (dai->id == MSM_TERT_MI2S_RX)
ctrl = &mi2s_config_controls[2];
if (dai->id == MSM_QUAT_MI2S)
if (dai->id == MSM_QUAT_MI2S_RX)
ctrl = &mi2s_config_controls[3];
if (dai->id == MSM_QUIN_MI2S)
if (dai->id == MSM_QUIN_MI2S_RX)
ctrl = &mi2s_config_controls[4];
if (dai->id == MSM_SENARY_MI2S)
if (dai->id == MSM_SENARY_MI2S_RX)
ctrl = &mi2s_config_controls[5];
}
if (ctrl) {
kcontrol = snd_ctl_new1(ctrl,
&mi2s_dai_data->rx_dai.mi2s_dai_data);
rc = snd_ctl_add(dai->component->card->snd_card, kcontrol);
if (rc < 0) {
dev_err(dai->dev, "%s: err add RX fmt ctl DAI = %s\n",
__func__, dai->name);
goto rtn;
}
}
ctrl = NULL;
if (mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.channel_mode) {
if (dai->id == MSM_PRIM_MI2S)
if (dai->id == MSM_PRIM_MI2S_TX)
ctrl = &mi2s_config_controls[6];
if (dai->id == MSM_SEC_MI2S)
if (dai->id == MSM_SEC_MI2S_TX)
ctrl = &mi2s_config_controls[7];
if (dai->id == MSM_TERT_MI2S)
if (dai->id == MSM_TERT_MI2S_TX)
ctrl = &mi2s_config_controls[8];
if (dai->id == MSM_QUAT_MI2S)
if (dai->id == MSM_QUAT_MI2S_TX)
ctrl = &mi2s_config_controls[9];
if (dai->id == MSM_QUIN_MI2S)
if (dai->id == MSM_QUIN_MI2S_TX)
ctrl = &mi2s_config_controls[10];
if (dai->id == MSM_SENARY_MI2S)
if (dai->id == MSM_SENARY_MI2S_TX)
ctrl = &mi2s_config_controls[11];
if (dai->id == MSM_INT5_MI2S)
if (dai->id == MSM_INT5_MI2S_TX)
ctrl = &mi2s_config_controls[12];
}
if (ctrl) {
rc = snd_ctl_add(dai->component->card->snd_card,
snd_ctl_new1(ctrl,
&mi2s_dai_data->tx_dai.mi2s_dai_data));
&mi2s_dai_data->mi2s_dai.mi2s_dai_data));
if (rc < 0) {
if (kcontrol)
snd_ctl_remove(dai->component->card->snd_card,
kcontrol);
dev_err(dai->dev, "%s: err add TX fmt ctl DAI = %s\n",
dev_err(dai->dev, "%s: err add MI2S fmt ctl DAI = %s\n",
__func__, dai->name);
}
}
if (dai->id == MSM_INT5_MI2S)
if (dai->id == MSM_INT5_MI2S_TX)
vi_feed_ctrl = &mi2s_vi_feed_controls[0];
if (vi_feed_ctrl) {
rc = snd_ctl_add(dai->component->card->snd_card,
snd_ctl_new1(vi_feed_ctrl,
&mi2s_dai_data->tx_dai.mi2s_dai_data));
&mi2s_dai_data->mi2s_dai.mi2s_dai_data));
if (rc < 0) {
dev_err(dai->dev, "%s: err add TX vi feed channel ctl DAI = %s\n",
@ -5900,7 +5883,6 @@ static int msm_dai_q6_dai_mi2s_probe(struct snd_soc_dai *dai)
}
rc = msm_dai_q6_dai_add_route(dai);
rtn:
return rc;
}
@ -5910,23 +5892,22 @@ static int msm_dai_q6_dai_mi2s_remove(struct snd_soc_dai *dai)
struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
dev_get_drvdata(dai->dev);
int rc;
bool rx_port_en = false;
/* If AFE port is still up, close it */
if (strnstr(dev_name(dai->dev), "rx", strlen(dev_name(dai->dev)))
!= NULL)
rx_port_en = true;
if (test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask)) {
rc = afe_close(MI2S_RX); /* can block */
mi2s_dai_data->mi2s_dai.mi2s_dai_data.status_mask)) {
if (rx_port_en)
rc = afe_close(MI2S_RX); /* can block */
else
rc = afe_close(MI2S_TX); /* can block */
if (rc < 0)
dev_err(dai->dev, "fail to close MI2S_RX port\n");
clear_bit(STATUS_PORT_STARTED,
mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask);
}
if (test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
rc = afe_close(MI2S_TX); /* can block */
if (rc < 0)
dev_err(dai->dev, "fail to close MI2S_TX port\n");
clear_bit(STATUS_PORT_STARTED,
mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask);
mi2s_dai_data->mi2s_dai.mi2s_dai_data.status_mask);
}
return 0;
}
@ -5945,46 +5926,46 @@ static int msm_mi2s_get_port_id(u32 mi2s_id, int stream, u16 *port_id)
switch (stream) {
case SNDRV_PCM_STREAM_PLAYBACK:
switch (mi2s_id) {
case MSM_PRIM_MI2S:
case MSM_PRIM_MI2S_RX:
*port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
break;
case MSM_SEC_MI2S:
case MSM_SEC_MI2S_RX:
*port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
break;
case MSM_TERT_MI2S:
case MSM_TERT_MI2S_RX:
*port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
break;
case MSM_QUAT_MI2S:
case MSM_QUAT_MI2S_RX:
*port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
break;
case MSM_SEC_MI2S_SD1:
*port_id = AFE_PORT_ID_SECONDARY_MI2S_RX_SD1;
break;
case MSM_QUIN_MI2S:
case MSM_QUIN_MI2S_RX:
*port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
break;
case MSM_SENARY_MI2S:
case MSM_SENARY_MI2S_RX:
*port_id = AFE_PORT_ID_SENARY_MI2S_RX;
break;
case MSM_INT0_MI2S:
case MSM_INT0_MI2S_RX:
*port_id = AFE_PORT_ID_INT0_MI2S_RX;
break;
case MSM_INT1_MI2S:
case MSM_INT1_MI2S_RX:
*port_id = AFE_PORT_ID_INT1_MI2S_RX;
break;
case MSM_INT2_MI2S:
case MSM_INT2_MI2S_RX:
*port_id = AFE_PORT_ID_INT2_MI2S_RX;
break;
case MSM_INT3_MI2S:
case MSM_INT3_MI2S_RX:
*port_id = AFE_PORT_ID_INT3_MI2S_RX;
break;
case MSM_INT4_MI2S:
case MSM_INT4_MI2S_RX:
*port_id = AFE_PORT_ID_INT4_MI2S_RX;
break;
case MSM_INT5_MI2S:
case MSM_INT5_MI2S_RX:
*port_id = AFE_PORT_ID_INT5_MI2S_RX;
break;
case MSM_INT6_MI2S:
case MSM_INT6_MI2S_RX:
*port_id = AFE_PORT_ID_INT6_MI2S_RX;
break;
default:
@ -5996,43 +5977,43 @@ static int msm_mi2s_get_port_id(u32 mi2s_id, int stream, u16 *port_id)
break;
case SNDRV_PCM_STREAM_CAPTURE:
switch (mi2s_id) {
case MSM_PRIM_MI2S:
case MSM_PRIM_MI2S_TX:
*port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
break;
case MSM_SEC_MI2S:
case MSM_SEC_MI2S_TX:
*port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
break;
case MSM_TERT_MI2S:
case MSM_TERT_MI2S_TX:
*port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
break;
case MSM_QUAT_MI2S:
case MSM_QUAT_MI2S_TX:
*port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
break;
case MSM_QUIN_MI2S:
case MSM_QUIN_MI2S_TX:
*port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
break;
case MSM_SENARY_MI2S:
case MSM_SENARY_MI2S_TX:
*port_id = AFE_PORT_ID_SENARY_MI2S_TX;
break;
case MSM_INT0_MI2S:
case MSM_INT0_MI2S_TX:
*port_id = AFE_PORT_ID_INT0_MI2S_TX;
break;
case MSM_INT1_MI2S:
case MSM_INT1_MI2S_TX:
*port_id = AFE_PORT_ID_INT1_MI2S_TX;
break;
case MSM_INT2_MI2S:
case MSM_INT2_MI2S_TX:
*port_id = AFE_PORT_ID_INT2_MI2S_TX;
break;
case MSM_INT3_MI2S:
case MSM_INT3_MI2S_TX:
*port_id = AFE_PORT_ID_INT3_MI2S_TX;
break;
case MSM_INT4_MI2S:
case MSM_INT4_MI2S_TX:
*port_id = AFE_PORT_ID_INT4_MI2S_TX;
break;
case MSM_INT5_MI2S:
case MSM_INT5_MI2S_TX:
*port_id = AFE_PORT_ID_INT5_MI2S_TX;
break;
case MSM_INT6_MI2S:
case MSM_INT6_MI2S_TX:
*port_id = AFE_PORT_ID_INT6_MI2S_TX;
break;
default:
@ -6056,9 +6037,7 @@ static int msm_dai_q6_mi2s_prepare(struct snd_pcm_substream *substream,
struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
dev_get_drvdata(dai->dev);
struct msm_dai_q6_dai_data *dai_data =
(substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
&mi2s_dai_data->rx_dai.mi2s_dai_data :
&mi2s_dai_data->tx_dai.mi2s_dai_data);
&mi2s_dai_data->mi2s_dai.mi2s_dai_data;
u16 port_id = 0;
int rc = 0;
@ -6101,8 +6080,7 @@ static int msm_dai_q6_mi2s_hw_params(struct snd_pcm_substream *substream,
struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
dev_get_drvdata(dai->dev);
struct msm_dai_q6_mi2s_dai_config *mi2s_dai_config =
(substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
&mi2s_dai_data->rx_dai : &mi2s_dai_data->tx_dai);
&mi2s_dai_data->mi2s_dai;
struct msm_dai_q6_dai_data *dai_data = &mi2s_dai_config->mi2s_dai_data;
struct afe_param_id_i2s_cfg *i2s = &dai_data->port_config.i2s;
@ -6287,29 +6265,7 @@ static int msm_dai_q6_mi2s_hw_params(struct snd_pcm_substream *substream,
dai_data->port_config.i2s.i2s_cfg_minor_version =
AFE_API_VERSION_I2S_CONFIG;
dai_data->port_config.i2s.sample_rate = dai_data->rate;
if ((test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) &&
test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->rx_dai.mi2s_dai_data.hwfree_status)) ||
(test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask) &&
test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->tx_dai.mi2s_dai_data.hwfree_status))) {
if ((mi2s_dai_data->tx_dai.mi2s_dai_data.rate !=
mi2s_dai_data->rx_dai.mi2s_dai_data.rate) ||
(mi2s_dai_data->rx_dai.mi2s_dai_data.bitwidth !=
mi2s_dai_data->tx_dai.mi2s_dai_data.bitwidth)) {
dev_err(dai->dev, "%s: Error mismatch in HW params\n"
"Tx sample_rate = %u bit_width = %hu\n"
"Rx sample_rate = %u bit_width = %hu\n"
, __func__,
mi2s_dai_data->tx_dai.mi2s_dai_data.rate,
mi2s_dai_data->tx_dai.mi2s_dai_data.bitwidth,
mi2s_dai_data->rx_dai.mi2s_dai_data.rate,
mi2s_dai_data->rx_dai.mi2s_dai_data.bitwidth);
return -EINVAL;
}
}
dev_dbg(dai->dev, "%s: dai id %d dai_data->channels = %d\n"
"sample_rate = %u i2s_cfg_minor_version = 0x%x\n"
"bit_width = %hu channel_mode = 0x%x mono_stereo = %#x\n"
@ -6334,9 +6290,7 @@ static int msm_dai_q6_mi2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
dev_get_drvdata(dai->dev);
if (test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) ||
test_bit(STATUS_PORT_STARTED,
mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
mi2s_dai_data->mi2s_dai.mi2s_dai_data.status_mask)) {
dev_err(dai->dev, "%s: err chg i2s mode while dai running",
__func__);
return -EPERM;
@ -6345,12 +6299,10 @@ static int msm_dai_q6_mi2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
case SND_SOC_DAIFMT_CBM_CFS:
mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.ws_src = 1;
mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.ws_src = 1;
mi2s_dai_data->mi2s_dai.mi2s_dai_data.port_config.i2s.ws_src = 1;
break;
case SND_SOC_DAIFMT_CBM_CFM:
mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.i2s.ws_src = 0;
mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.i2s.ws_src = 0;
mi2s_dai_data->mi2s_dai.mi2s_dai_data.port_config.i2s.ws_src = 0;
break;
default:
pr_err("%s: fmt %d\n",
@ -6367,9 +6319,7 @@ static int msm_dai_q6_mi2s_hw_free(struct snd_pcm_substream *substream,
struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
dev_get_drvdata(dai->dev);
struct msm_dai_q6_dai_data *dai_data =
(substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
&mi2s_dai_data->rx_dai.mi2s_dai_data :
&mi2s_dai_data->tx_dai.mi2s_dai_data);
&mi2s_dai_data->mi2s_dai.mi2s_dai_data;
if (test_bit(STATUS_PORT_STARTED, dai_data->hwfree_status)) {
clear_bit(STATUS_PORT_STARTED, dai_data->hwfree_status);
@ -6384,9 +6334,7 @@ static void msm_dai_q6_mi2s_shutdown(struct snd_pcm_substream *substream,
struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
dev_get_drvdata(dai->dev);
struct msm_dai_q6_dai_data *dai_data =
(substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
&mi2s_dai_data->rx_dai.mi2s_dai_data :
&mi2s_dai_data->tx_dai.mi2s_dai_data);
&mi2s_dai_data->mi2s_dai.mi2s_dai_data;
u16 port_id = 0;
int rc = 0;
@ -6437,6 +6385,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 384000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Primary MI2S_RX",
.id = MSM_PRIM_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Primary MI2S Capture",
.aif_name = "PRI_MI2S_TX",
@ -6450,8 +6405,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Primary MI2S",
.id = MSM_PRIM_MI2S,
.name = "Primary MI2S_TX",
.id = MSM_PRIM_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6468,6 +6423,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Secondary MI2S_RX",
.id = MSM_SEC_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Secondary MI2S Capture",
.aif_name = "SEC_MI2S_TX",
@ -6481,8 +6443,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Secondary MI2S",
.id = MSM_SEC_MI2S,
.name = "Secondary MI2S_TX",
.id = MSM_SEC_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6499,6 +6461,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Tertiary MI2S_RX",
.id = MSM_TERT_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Tertiary MI2S Capture",
.aif_name = "TERT_MI2S_TX",
@ -6512,8 +6481,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Tertiary MI2S",
.id = MSM_TERT_MI2S,
.name = "Tertiary MI2S_TX",
.id = MSM_TERT_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6530,6 +6499,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Quaternary MI2S_RX",
.id = MSM_QUAT_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Quaternary MI2S Capture",
.aif_name = "QUAT_MI2S_TX",
@ -6543,8 +6519,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Quaternary MI2S",
.id = MSM_QUAT_MI2S,
.name = "Quaternary MI2S_TX",
.id = MSM_QUAT_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6559,6 +6535,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Quinary MI2S_RX",
.id = MSM_QUIN_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Quinary MI2S Capture",
.aif_name = "QUIN_MI2S_TX",
@ -6569,8 +6552,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Quinary MI2S",
.id = MSM_QUIN_MI2S,
.name = "Quinary MI2S_TX",
.id = MSM_QUIN_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6584,6 +6567,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Senary MI2S_RX",
.id = MSM_SENARY_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "Senary MI2S Capture",
.aif_name = "SENARY_MI2S_TX",
@ -6594,8 +6584,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "Senary MI2S",
.id = MSM_SENARY_MI2S,
.name = "Senary MI2S_TX",
.id = MSM_SENARY_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6624,6 +6614,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT0 MI2S_RX",
.id = MSM_INT0_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT0 MI2S Capture",
.aif_name = "INT0_MI2S_TX",
@ -6634,8 +6631,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT0 MI2S",
.id = MSM_INT0_MI2S,
.name = "INT0 MI2S_TX",
.id = MSM_INT0_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6651,6 +6648,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT1 MI2S_RX",
.id = MSM_INT1_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT1 MI2S Capture",
.aif_name = "INT1_MI2S_TX",
@ -6661,8 +6665,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT1 MI2S",
.id = MSM_INT1_MI2S,
.name = "INT1 MI2S_TX",
.id = MSM_INT1_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6678,6 +6682,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT2 MI2S_RX",
.id = MSM_INT2_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT2 MI2S Capture",
.aif_name = "INT2_MI2S_TX",
@ -6688,8 +6699,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT2 MI2S",
.id = MSM_INT2_MI2S,
.name = "INT2 MI2S_TX",
.id = MSM_INT2_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6705,6 +6716,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT3 MI2S_RX",
.id = MSM_INT3_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT3 MI2S Capture",
.aif_name = "INT3_MI2S_TX",
@ -6715,8 +6733,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT3 MI2S",
.id = MSM_INT3_MI2S,
.name = "INT3 MI2S_TX",
.id = MSM_INT3_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6733,6 +6751,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 192000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT4 MI2S_RX",
.id = MSM_INT4_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT4 MI2S Capture",
.aif_name = "INT4_MI2S_TX",
@ -6743,8 +6768,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT4 MI2S",
.id = MSM_INT4_MI2S,
.name = "INT4 MI2S_TX",
.id = MSM_INT4_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6760,6 +6785,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT5 MI2S_RX",
.id = MSM_INT5_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT5 MI2S Capture",
.aif_name = "INT5_MI2S_TX",
@ -6770,8 +6802,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT5 MI2S",
.id = MSM_INT5_MI2S,
.name = "INT5 MI2S_TX",
.id = MSM_INT5_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -6787,6 +6819,13 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_min = 8000,
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT6 MI2S_RX",
.id = MSM_INT6_MI2S_RX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
{
.capture = {
.stream_name = "INT6 MI2S Capture",
.aif_name = "INT6_MI2S_TX",
@ -6797,8 +6836,8 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
.rate_max = 48000,
},
.ops = &msm_dai_q6_mi2s_ops,
.name = "INT6 MI2S",
.id = MSM_INT6_MI2S,
.name = "INT6 MI2S_TX",
.id = MSM_INT6_MI2S_TX,
.probe = msm_dai_q6_dai_mi2s_probe,
.remove = msm_dai_q6_dai_mi2s_remove,
},
@ -7003,44 +7042,39 @@ static int msm_dai_q6_mi2s_platform_data_validation(
return -EINVAL;
}
rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->rx_sd_lines,
&sd_line, &ch_cnt);
rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->sd_lines,
&sd_line, &ch_cnt);
if (rc < 0) {
dev_err(&pdev->dev, "invalid MI2S RX sd line config\n");
goto rtn;
}
if (ch_cnt) {
dai_data->rx_dai.mi2s_dai_data.port_config.i2s.channel_mode =
sd_line;
dai_data->rx_dai.pdata_mi2s_lines = sd_line;
dai_driver->playback.channels_min = 1;
dai_driver->playback.channels_max = ch_cnt << 1;
if (strnstr(dev_name(&pdev->dev), "rx", strlen(dev_name(&pdev->dev)))
!= NULL) {
if (ch_cnt) {
dai_data->mi2s_dai.mi2s_dai_data.port_config.i2s.channel_mode =
sd_line;
dai_data->mi2s_dai.pdata_mi2s_lines = sd_line;
dai_driver->playback.channels_min = 1;
dai_driver->playback.channels_max = ch_cnt << 1;
} else {
dai_driver->playback.channels_min = 0;
dai_driver->playback.channels_max = 0;
}
} else {
dai_driver->playback.channels_min = 0;
dai_driver->playback.channels_max = 0;
if (ch_cnt) {
dai_data->mi2s_dai.mi2s_dai_data.port_config.i2s.channel_mode =
sd_line;
dai_data->mi2s_dai.pdata_mi2s_lines = sd_line;
dai_driver->capture.channels_min = 1;
dai_driver->capture.channels_max = ch_cnt << 1;
} else {
dai_driver->capture.channels_min = 0;
dai_driver->capture.channels_max = 0;
}
}
rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->tx_sd_lines,
&sd_line, &ch_cnt);
if (rc < 0) {
dev_err(&pdev->dev, "invalid MI2S TX sd line config\n");
goto rtn;
}
if (ch_cnt) {
dai_data->tx_dai.mi2s_dai_data.port_config.i2s.channel_mode =
sd_line;
dai_data->tx_dai.pdata_mi2s_lines = sd_line;
dai_driver->capture.channels_min = 1;
dai_driver->capture.channels_max = ch_cnt << 1;
} else {
dai_driver->capture.channels_min = 0;
dai_driver->capture.channels_max = 0;
}
dev_dbg(&pdev->dev, "%s: playback sdline 0x%x capture sdline 0x%x\n",
__func__, dai_data->rx_dai.pdata_mi2s_lines,
dai_data->tx_dai.pdata_mi2s_lines);
dev_dbg(&pdev->dev, "%s: sdlines 0x%x\n",
__func__, dai_data->mi2s_dai.pdata_mi2s_lines);
dev_dbg(&pdev->dev, "%s: playback ch_max %d capture ch_mx %d\n",
__func__, dai_driver->playback.channels_max,
dai_driver->capture.channels_max);
@ -7055,8 +7089,7 @@ static int msm_dai_q6_mi2s_dev_probe(struct platform_device *pdev)
{
struct msm_dai_q6_mi2s_dai_data *dai_data;
const char *q6_mi2s_dev_id = "qcom,msm-dai-q6-mi2s-dev-id";
u32 tx_line = 0;
u32 rx_line = 0;
u32 mi2s_intf_line = 0;
u32 mi2s_intf = 0;
struct msm_mi2s_pdata *mi2s_pdata;
int rc;
@ -7069,8 +7102,8 @@ static int msm_dai_q6_mi2s_dev_probe(struct platform_device *pdev)
goto rtn;
}
dev_dbg(&pdev->dev, "dev name %s dev id 0x%x\n", dev_name(&pdev->dev),
mi2s_intf);
dev_dbg(&pdev->dev, "dev name %s dev id 0x%x\n",
dev_name(&pdev->dev), mi2s_intf);
if ((mi2s_intf < MSM_MI2S_MIN || mi2s_intf > MSM_MI2S_MAX)
|| (mi2s_intf >= ARRAY_SIZE(msm_dai_q6_mi2s_dai))) {
@ -7089,25 +7122,16 @@ static int msm_dai_q6_mi2s_dev_probe(struct platform_device *pdev)
goto rtn;
}
rc = of_property_read_u32(pdev->dev.of_node, "qcom,msm-mi2s-rx-lines",
&rx_line);
rc = of_property_read_u32(pdev->dev.of_node,
"qcom,msm-mi2s-lines", &mi2s_intf_line);
if (rc) {
dev_err(&pdev->dev, "%s: Rx line from DT file %s\n", __func__,
"qcom,msm-mi2s-rx-lines");
dev_err(&pdev->dev,
"%s: Mi2s line from DT file %s\n", __func__,
"qcom,msm-mi2s-lines");
goto free_pdata;
}
rc = of_property_read_u32(pdev->dev.of_node, "qcom,msm-mi2s-tx-lines",
&tx_line);
if (rc) {
dev_err(&pdev->dev, "%s: Tx line from DT file %s\n", __func__,
"qcom,msm-mi2s-tx-lines");
goto free_pdata;
}
dev_dbg(&pdev->dev, "dev name %s Rx line 0x%x , Tx ine 0x%x\n",
dev_name(&pdev->dev), rx_line, tx_line);
mi2s_pdata->rx_sd_lines = rx_line;
mi2s_pdata->tx_sd_lines = tx_line;
mi2s_pdata->sd_lines = mi2s_intf_line;
mi2s_pdata->intf_id = mi2s_intf;
dai_data = kzalloc(sizeof(struct msm_dai_q6_mi2s_dai_data),

50
asoc/msm-dai-q6-v2.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2012-2017, 2019 The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2017, 2019, 2021 The Linux Foundation. All rights reserved.
*/
#ifndef __MSM_DAI_Q6_PDATA_H__
@ -18,22 +18,35 @@
#define MSM_MI2S_CAP_RX 0
#define MSM_MI2S_CAP_TX 1
#define MSM_PRIM_MI2S 0
#define MSM_SEC_MI2S 1
#define MSM_TERT_MI2S 2
#define MSM_QUAT_MI2S 3
#define MSM_QUIN_MI2S 4
#define MSM_SENARY_MI2S 5
#define MSM_SEC_MI2S_SD1 6
#define MSM_INT0_MI2S 7
#define MSM_INT1_MI2S 8
#define MSM_INT2_MI2S 9
#define MSM_INT3_MI2S 10
#define MSM_INT4_MI2S 11
#define MSM_INT5_MI2S 12
#define MSM_INT6_MI2S 13
#define MSM_MI2S_MIN MSM_PRIM_MI2S
#define MSM_MI2S_MAX MSM_INT6_MI2S
#define MSM_PRIM_MI2S_RX 0
#define MSM_PRIM_MI2S_TX 1
#define MSM_SEC_MI2S_RX 2
#define MSM_SEC_MI2S_TX 3
#define MSM_TERT_MI2S_RX 4
#define MSM_TERT_MI2S_TX 5
#define MSM_QUAT_MI2S_RX 6
#define MSM_QUAT_MI2S_TX 7
#define MSM_QUIN_MI2S_RX 8
#define MSM_QUIN_MI2S_TX 9
#define MSM_SENARY_MI2S_RX 10
#define MSM_SENARY_MI2S_TX 11
#define MSM_SEC_MI2S_SD1 12
#define MSM_INT0_MI2S_RX 13
#define MSM_INT0_MI2S_TX 14
#define MSM_INT1_MI2S_RX 15
#define MSM_INT1_MI2S_TX 16
#define MSM_INT2_MI2S_RX 17
#define MSM_INT2_MI2S_TX 18
#define MSM_INT3_MI2S_RX 19
#define MSM_INT3_MI2S_TX 20
#define MSM_INT4_MI2S_RX 21
#define MSM_INT4_MI2S_TX 22
#define MSM_INT5_MI2S_RX 23
#define MSM_INT5_MI2S_TX 24
#define MSM_INT6_MI2S_RX 25
#define MSM_INT6_MI2S_TX 26
#define MSM_MI2S_MIN MSM_PRIM_MI2S_RX
#define MSM_MI2S_MAX MSM_INT6_MI2S_TX
#define MSM_DISPLAY_PORT 0
#define MSM_DISPLAY_PORT1 1
@ -60,8 +73,7 @@ struct msm_dai_auxpcm_pdata {
};
struct msm_mi2s_pdata {
u16 rx_sd_lines;
u16 tx_sd_lines;
u16 sd_lines;
u16 intf_id;
};