From 8d186332a544b012fc6335e0633ef005269a8f7c Mon Sep 17 00:00:00 2001
From: duqiu2 <duqiu2@lenovo.com>
Date: Mon, 21 Jun 2021 19:21:16 +0800
Subject: [PATCH] nfc: config: initial the config file for Corfup

Corfup use ST21J nfc controller.
Enable the driver and nfc config for it.

Change-Id: I8a0cfba5a8509d86a4952c1c36ba338a2aecd0b4
Signed-off-by: duqiu2 <duqiu2@lenovo.com>
Reviewed-on: https://gerrit.mot.com/1986447
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Xu Du <duxu1@motorola.com>
Reviewed-by: Weilong Wu <wuwl10@motorola.com>
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
---
 qcom/holi-corfup-common-overlay.dtsi | 31 +++++++++++++++-------------
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/qcom/holi-corfup-common-overlay.dtsi b/qcom/holi-corfup-common-overlay.dtsi
index 9ef51b9e6ee2..120072dad2ed 100644
--- a/qcom/holi-corfup-common-overlay.dtsi
+++ b/qcom/holi-corfup-common-overlay.dtsi
@@ -66,13 +66,13 @@
 
 		nfc_enable_active: nfc_enable_active {
 			mux {
-				/* 48: Enable, 8: Firmware*/
-				pins = "gpio48", "gpio8";
+				/* 6: Enable */
+				pins = "gpio6";
 				function = "gpio";
 			};
 
 			config {
-				pins = "gpio48", "gpio8";
+				pins = "gpio6";
 				drive-strength = <2>; /* 2 MA */
 				bias-disable;
 			};
@@ -80,13 +80,13 @@
 
 		nfc_enable_suspend: nfc_enable_suspend {
 			mux {
-				/* 48: Enable, 8: Firmware */
-				pins = "gpio48", "gpio8";
+				/* 6: Enable */
+				pins = "gpio6";
 				function = "gpio";
 			};
 
 			config {
-				pins = "gpio48", "gpio8";
+				pins = "gpio6";
 				drive-strength = <2>; /* 2 MA */
 				bias-disable;
 			};
@@ -113,7 +113,7 @@
 			/* sleep state */
 			mux {
 				/* GPIO 7: NFC CLK Req */
-				pins = "gpi7";
+				pins = "gpio7";
 				function = "gpio";
 			};
 
@@ -345,13 +345,16 @@
 
 &qupv3_se7_i2c {
 	status = "ok";
-	nq@28 {
-		compatible = "qcom,sn-nci";
-		reg = <0x28>;
-		qcom,sn-irq = <&tlmm 9 0x00>;
-		qcom,sn-ven = <&tlmm 48 0x00>;
-		qcom,sn-firm = <&tlmm 8 0x00>;
-		qcom,sn-clkreq = <&tlmm 7 0x00>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	st21nfc@8 {
+		compatible = "st,st21nfc";
+		mmi,status = "/chosen", "mmi,nfc", "st";
+		status = "ok";
+		reg = <0x08>;
+		st,irq_gpio = <&tlmm 9 0x00>;
+		st,reset_gpio = <&tlmm 6 0x00>;
+		st,clkreq_gpio = <&tlmm 7 0x00>;
 		interrupt-parent = <&tlmm>;
 		interrupts = <9 0>;
 		interrupt-names = "nfc_irq";