mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
ARM: SoC platform updates
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
* Gemini:
- Legacy platform that Linus Walleij has converted to multiplatform
and DT, so a handful of various tweaks there, removal of some old
stale support, etc.
* Atmel AT91:
- Fixup of various power management related pieces
- Move of SoC detection to a drivers/soc driver instead
* ST Micro STM32:
- New SoC support: STM32H743
* TI platforms:
- More driver support for Davinci (SATA in particular)
- Removal of some old stale hwmod files (linkspace platform)
* Misc:
- A couple of smaller patches for i.MX, sunxi, hisi
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZEANUAAoJEIwa5zzehBx3XS8P/0qIIbAW2UvPMTN7ONVAarQL
Ri+ZfmxxUmgWBkXEV6XICrwGwwH8l87o8+TLvQZbPmSnZa9gxT8/OF8smQhYhGqr
5hpmRpg2yhssLgxMaL9YQtwl7Au/EvYHgvVPaE6UxI/DEN1QzDiI4x0gsEu5f4oz
3cLh1JqFnP5X0j0wdtsn4B21dQGbqQsUVbqysq48NYHuDOlbwfUj2f8y8TMmCVBP
gn736jHUxinQd4vDUFiSmVflNPS2ApaIaVs1KTedmkFA3yZMJUNVp6QqDc+Xpk8l
tIMcrSdATckgIIgbs2bCBQr4Ji4jkyWnlR1rqsg1GKCP+OQdnnTyEEzWOwW2KXRF
faSr+CKB9mM79TZkRdjV494uwbc8Xg+JnfTHLAaO8fmMmNE8z5pnTNw2RBnS6BIk
wpgUVEcCJWEzUodNhuByB328qUXhQ716N3jYb+IN9vEv1MbjuGpsH/DC9EkMv0+k
cLuhiNmLVbIfHX3u6xTsqtVWjipV0D0cb7WI1a4SZHx/hTmlKc7Q4/wQXH1IykDA
Y/36NG+jxIjx7a3sFc59LoIvuZOkuGf3EaSSxsrbt3/mFdKXjdq0vNCiluVpSakZ
2rzzKePktKr//PxYVB7tvpSs9f/IBpsiy47NDxVvH2DvtohfhEnVxTIKZQiA01U4
sjVToA5ovDHJAne9sIAB
=ZdtJ
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
Gemini:
- Legacy platform that Linus Walleij has converted to multiplatform
and DT, so a handful of various tweaks there, removal of some old
stale support, etc.
Atmel AT91:
- Fixup of various power management related pieces
- Move of SoC detection to a drivers/soc driver instead
ST Micro STM32:
- New SoC support: STM32H743
TI platforms:
- More driver support for Davinci (SATA in particular)
- Removal of some old stale hwmod files (linkspace platform)
Misc:
- A couple of smaller patches for i.MX, sunxi, hisi"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
ARM: davinci: Add clock for CPPI 4.1 DMA engine
ARM: mxs: add support for I2SE Duckbill 2 boards
MAINTAINERS: Update the Allwinner sunXi entry
ARM: i.MX25: globally disable supervisor protect
ARM: at91: move SoC detection to its own driver
ARM: at91: pm: correct typo
ARM: at91: pm: Remove at91_pm_set_standby
ARM: at91: pm: Merge all at91sam9*_pm_init
ARM: at91: pm: Tie the USB clock mask to the pmc
ARM: at91: pm: Tie the memory controller type to the ramc id
ARM: at91: pm: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.
ARM: at91: pm: Simplify at91rm9200_standby
ARM: at91: pm: Use struct at91_pm_data in pm_suspend.S
ARM: at91: pm: Move global variables into at91_pm_data
ARM: at91: pm: Move at91_ramc_read/write to pm.c
ARM: at91: pm: Cleanup headers
MAINTAINERS: Add memory drivers to AT91 entry
MAINTAINERS: Update AT91 entry
ARM: davinci: add pata_bk3710 libata driver support
ARM: OMAP2+: mark omap_init_rng as __init
...
This commit is contained in:
Linus Torvalds
commit
8d648aad05
74 changed files with 887 additions and 2571 deletions
|
|
@ -1,5 +1,6 @@
|
|||
menu "SOC (System On Chip) specific Drivers"
|
||||
|
||||
source "drivers/soc/atmel/Kconfig"
|
||||
source "drivers/soc/bcm/Kconfig"
|
||||
source "drivers/soc/fsl/Kconfig"
|
||||
source "drivers/soc/mediatek/Kconfig"
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
# Makefile for the Linux Kernel SOC specific device drivers.
|
||||
#
|
||||
|
||||
obj-$(CONFIG_ARCH_AT91) += atmel/
|
||||
obj-y += bcm/
|
||||
obj-$(CONFIG_ARCH_DOVE) += dove/
|
||||
obj-$(CONFIG_MACH_DOVE) += dove/
|
||||
|
|
|
|||
6
drivers/soc/atmel/Kconfig
Normal file
6
drivers/soc/atmel/Kconfig
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
config AT91_SOC_ID
|
||||
bool "SoC bus for Atmel ARM SoCs"
|
||||
depends on ARCH_AT91 || COMPILE_TEST
|
||||
default ARCH_AT91
|
||||
help
|
||||
Include support for the SoC bus on the Atmel ARM SoCs.
|
||||
1
drivers/soc/atmel/Makefile
Normal file
1
drivers/soc/atmel/Makefile
Normal file
|
|
@ -0,0 +1 @@
|
|||
obj-$(CONFIG_AT91_SOC_ID) += soc.o
|
||||
231
drivers/soc/atmel/soc.c
Normal file
231
drivers/soc/atmel/soc.c
Normal file
|
|
@ -0,0 +1,231 @@
|
|||
/*
|
||||
* Copyright (C) 2015 Atmel
|
||||
*
|
||||
* Alexandre Belloni <alexandre.belloni@free-electrons.com
|
||||
* Boris Brezillon <boris.brezillon@free-electrons.com
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) "AT91: " fmt
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/sys_soc.h>
|
||||
|
||||
#include "soc.h"
|
||||
|
||||
#define AT91_DBGU_CIDR 0x40
|
||||
#define AT91_DBGU_EXID 0x44
|
||||
#define AT91_CHIPID_CIDR 0x00
|
||||
#define AT91_CHIPID_EXID 0x04
|
||||
#define AT91_CIDR_VERSION(x) ((x) & 0x1f)
|
||||
#define AT91_CIDR_EXT BIT(31)
|
||||
#define AT91_CIDR_MATCH_MASK 0x7fffffe0
|
||||
|
||||
static const struct at91_soc __initconst socs[] = {
|
||||
#ifdef CONFIG_SOC_AT91RM9200
|
||||
AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_AT91SAM9
|
||||
AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
|
||||
AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
|
||||
AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
|
||||
AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
|
||||
AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
|
||||
"at91sam9m11", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
|
||||
"at91sam9m10", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
|
||||
"at91sam9g46", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
|
||||
"at91sam9g45", "at91sam9g45"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
|
||||
"at91sam9g15", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
|
||||
"at91sam9g35", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
|
||||
"at91sam9x35", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
|
||||
"at91sam9g25", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
|
||||
"at91sam9x25", "at91sam9x5"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
|
||||
"at91sam9cn12", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
|
||||
"at91sam9n12", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
|
||||
"at91sam9cn11", "at91sam9n12"),
|
||||
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
|
||||
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
|
||||
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_SAMA5
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
|
||||
"sama5d21", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
|
||||
"sama5d22", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
|
||||
"sama5d23", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
|
||||
"sama5d24", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
|
||||
"sama5d24", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
|
||||
"sama5d26", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
|
||||
"sama5d27", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
|
||||
"sama5d27", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
|
||||
"sama5d28", "sama5d2"),
|
||||
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
|
||||
"sama5d28", "sama5d2"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
|
||||
"sama5d31", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
|
||||
"sama5d33", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
|
||||
"sama5d34", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
|
||||
"sama5d35", "sama5d3"),
|
||||
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
|
||||
"sama5d36", "sama5d3"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
|
||||
"sama5d41", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
|
||||
"sama5d42", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
|
||||
"sama5d43", "sama5d4"),
|
||||
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
|
||||
"sama5d44", "sama5d4"),
|
||||
#endif
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *regs;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
|
||||
if (!np)
|
||||
np = of_find_compatible_node(NULL, NULL,
|
||||
"atmel,at91sam9260-dbgu");
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
regs = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
if (!regs) {
|
||||
pr_warn("Could not map DBGU iomem range");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
*cidr = readl(regs + AT91_DBGU_CIDR);
|
||||
*exid = readl(regs + AT91_DBGU_EXID);
|
||||
|
||||
iounmap(regs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *regs;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
regs = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
|
||||
if (!regs) {
|
||||
pr_warn("Could not map DBGU iomem range");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
*cidr = readl(regs + AT91_CHIPID_CIDR);
|
||||
*exid = readl(regs + AT91_CHIPID_EXID);
|
||||
|
||||
iounmap(regs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
|
||||
{
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
const struct at91_soc *soc;
|
||||
struct soc_device *soc_dev;
|
||||
u32 cidr, exid;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
|
||||
* in the dbgu device but in the chipid device whose purpose is only
|
||||
* to expose these two registers.
|
||||
*/
|
||||
ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
|
||||
if (ret)
|
||||
ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
|
||||
if (ret) {
|
||||
if (ret == -ENODEV)
|
||||
pr_warn("Could not find identification node");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
for (soc = socs; soc->name; soc++) {
|
||||
if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
|
||||
continue;
|
||||
|
||||
if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!soc->name) {
|
||||
pr_warn("Could not find matching SoC description\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
||||
if (!soc_dev_attr)
|
||||
return NULL;
|
||||
|
||||
soc_dev_attr->family = soc->family;
|
||||
soc_dev_attr->soc_id = soc->name;
|
||||
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
|
||||
AT91_CIDR_VERSION(cidr));
|
||||
soc_dev = soc_device_register(soc_dev_attr);
|
||||
if (IS_ERR(soc_dev)) {
|
||||
kfree(soc_dev_attr->revision);
|
||||
kfree(soc_dev_attr);
|
||||
pr_warn("Could not register SoC device\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (soc->family)
|
||||
pr_info("Detected SoC family: %s\n", soc->family);
|
||||
pr_info("Detected SoC: %s, revision %X\n", soc->name,
|
||||
AT91_CIDR_VERSION(cidr));
|
||||
|
||||
return soc_dev;
|
||||
}
|
||||
|
||||
static int __init atmel_soc_device_init(void)
|
||||
{
|
||||
at91_soc_init(socs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
subsys_initcall(atmel_soc_device_init);
|
||||
91
drivers/soc/atmel/soc.h
Normal file
91
drivers/soc/atmel/soc.h
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
/*
|
||||
* Copyright (C) 2015 Atmel
|
||||
*
|
||||
* Boris Brezillon <boris.brezillon@free-electrons.com
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AT91_SOC_H
|
||||
#define __AT91_SOC_H
|
||||
|
||||
#include <linux/sys_soc.h>
|
||||
|
||||
struct at91_soc {
|
||||
u32 cidr_match;
|
||||
u32 exid_match;
|
||||
const char *name;
|
||||
const char *family;
|
||||
};
|
||||
|
||||
#define AT91_SOC(__cidr, __exid, __name, __family) \
|
||||
{ \
|
||||
.cidr_match = (__cidr), \
|
||||
.exid_match = (__exid), \
|
||||
.name = (__name), \
|
||||
.family = (__family), \
|
||||
}
|
||||
|
||||
struct soc_device * __init
|
||||
at91_soc_init(const struct at91_soc *socs);
|
||||
|
||||
#define AT91RM9200_CIDR_MATCH 0x09290780
|
||||
|
||||
#define AT91SAM9260_CIDR_MATCH 0x019803a0
|
||||
#define AT91SAM9261_CIDR_MATCH 0x019703a0
|
||||
#define AT91SAM9263_CIDR_MATCH 0x019607a0
|
||||
#define AT91SAM9G20_CIDR_MATCH 0x019905a0
|
||||
#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
|
||||
#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
|
||||
#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
|
||||
#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
|
||||
|
||||
#define AT91SAM9M11_EXID_MATCH 0x00000001
|
||||
#define AT91SAM9M10_EXID_MATCH 0x00000002
|
||||
#define AT91SAM9G46_EXID_MATCH 0x00000003
|
||||
#define AT91SAM9G45_EXID_MATCH 0x00000004
|
||||
|
||||
#define AT91SAM9G15_EXID_MATCH 0x00000000
|
||||
#define AT91SAM9G35_EXID_MATCH 0x00000001
|
||||
#define AT91SAM9X35_EXID_MATCH 0x00000002
|
||||
#define AT91SAM9G25_EXID_MATCH 0x00000003
|
||||
#define AT91SAM9X25_EXID_MATCH 0x00000004
|
||||
|
||||
#define AT91SAM9CN12_EXID_MATCH 0x00000005
|
||||
#define AT91SAM9N12_EXID_MATCH 0x00000006
|
||||
#define AT91SAM9CN11_EXID_MATCH 0x00000009
|
||||
|
||||
#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
|
||||
#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
|
||||
#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
|
||||
|
||||
#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
|
||||
#define SAMA5D21CU_EXID_MATCH 0x0000005a
|
||||
#define SAMA5D22CU_EXID_MATCH 0x00000059
|
||||
#define SAMA5D22CN_EXID_MATCH 0x00000069
|
||||
#define SAMA5D23CU_EXID_MATCH 0x00000058
|
||||
#define SAMA5D24CX_EXID_MATCH 0x00000004
|
||||
#define SAMA5D24CU_EXID_MATCH 0x00000014
|
||||
#define SAMA5D26CU_EXID_MATCH 0x00000012
|
||||
#define SAMA5D27CU_EXID_MATCH 0x00000011
|
||||
#define SAMA5D27CN_EXID_MATCH 0x00000021
|
||||
#define SAMA5D28CU_EXID_MATCH 0x00000010
|
||||
#define SAMA5D28CN_EXID_MATCH 0x00000020
|
||||
|
||||
#define SAMA5D3_CIDR_MATCH 0x0a5c07c0
|
||||
#define SAMA5D31_EXID_MATCH 0x00444300
|
||||
#define SAMA5D33_EXID_MATCH 0x00414300
|
||||
#define SAMA5D34_EXID_MATCH 0x00414301
|
||||
#define SAMA5D35_EXID_MATCH 0x00584300
|
||||
#define SAMA5D36_EXID_MATCH 0x00004301
|
||||
|
||||
#define SAMA5D4_CIDR_MATCH 0x0a5c07c0
|
||||
#define SAMA5D41_EXID_MATCH 0x00000001
|
||||
#define SAMA5D42_EXID_MATCH 0x00000002
|
||||
#define SAMA5D43_EXID_MATCH 0x00000003
|
||||
#define SAMA5D44_EXID_MATCH 0x00000004
|
||||
|
||||
#endif /* __AT91_SOC_H */
|
||||
Loading…
Reference in a new issue