diff --git a/bindings/arm/msm/qcom,llcc.txt b/bindings/arm/msm/qcom,llcc.txt
index 4e9c4d83be5b..9d722dcf4c72 100644
--- a/bindings/arm/msm/qcom,llcc.txt
+++ b/bindings/arm/msm/qcom,llcc.txt
@@ -12,7 +12,7 @@ Properties:
 	Usage: required
 	Value type: <string>
 	Definition: must be "qcom,sdm845-llcc" or "qcom,lahaina-llcc"
-	            or "qcom,shima-llcc".
+	            or "qcom,shima-llcc" or "qcom,sdxlemur-llcc"
 		    "qcom,llcc-v2" must be appended for V2 hardware.
 
 - reg:
diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi
index 1e79a481fa3b..6074572d32fc 100644
--- a/qcom/sdxlemur.dtsi
+++ b/qcom/sdxlemur.dtsi
@@ -458,6 +458,15 @@
 		#hwlock-cells = <1>;
 	};
 
+	cache-controller@9200000 {
+		compatible = "qcom,sdxlemur-llcc", "qcom,llcc-v2";
+		reg = <0x9200000 0x50000>;
+		reg-names = "llcc_base";
+		cap-based-alloc-and-pwr-collapse;
+		clocks = <&aopcc QDSS_CLK>;
+		clock-names = "aopcc_closks";
+	};
+
 	smem: qcom,smem {
 		compatible = "qcom,smem";
 		memory-region = <&smem_mem>;