From a27679727193459c283c218f0c92632fd4eccaa1 Mon Sep 17 00:00:00 2001 From: Amir Vajid Date: Tue, 16 Jun 2020 15:22:23 -0700 Subject: [PATCH] ARM: dts: msm: group memlat mons into one cpugrp Reorganize memlat mons on lahaina such that they are all under a single cpugrp. Change-Id: I8fb7a1c4352af4f2b1bdc0bfe6141c1df34988a2 --- qcom/lahaina.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index ea92a7ac7215..9be810e4d428 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -3813,9 +3813,10 @@ < 2400000 1516800000 >; }; - cpu0_memlat_cpugrp: qcom,cpu0-cpugrp { + memlat_cpugrp: qcom,memlat-cpugrp { compatible = "qcom,arm-memlat-cpugrp"; - qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 + &CPU4 &CPU5 &CPU6 &CPU7>; cpu0_cpu_l3_latmon: qcom,cpu0-cpu-l3-latmon { compatible = "qcom,arm-memlat-mon"; @@ -3851,6 +3852,7 @@ cpu0_cpu_llcc_latmon: qcom,cpu0-cpu-llcc-latmon { compatible = "qcom,arm-memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; qcom,target-dev = <&cpu0_cpu_llcc_lat>; qcom,cachemiss-ev = <0x2A>; qcom,core-dev-table = @@ -3886,12 +3888,6 @@ }; }; - }; - - cpu4_memlat_cpugrp: qcom,cpu4-cpugrp { - compatible = "qcom,arm-memlat-cpugrp"; - qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; - cpu4_cpu_l3_latmon: qcom,cpu4-cpu-l3-latmon { compatible = "qcom,arm-memlat-mon"; qcom,cpulist = <&CPU4>; @@ -3926,6 +3922,7 @@ cpu4_cpu_llcc_latmon: qcom,cpu4-cpu-llcc-latmon { compatible = "qcom,arm-memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_llcc_lat>; qcom,cachemiss-ev = <0x2A>; qcom,core-dev-table = @@ -3972,6 +3969,7 @@ cpu4_computemon: qcom,cpu4-computemon { compatible = "qcom,arm-compute-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_ddr_latfloor>; ddr4-map { qcom,ddr-type = ; @@ -3990,6 +3988,7 @@ cpu4_llcc_computemon: qcom,cpu4-llcc-computemon { compatible = "qcom,arm-compute-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_llcc_latfloor>; qcom,core-dev-table = < 1804800 MHZ_TO_MBPS( 150, 16) >, @@ -4018,6 +4017,7 @@ cpu4_qoslatmon: qcom,cpu4-qoslatmon { compatible = "qcom,arm-memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_ddr_qoslat>; qcom,cachemiss-ev = <0x1000>; qcom,core-dev-table =