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ARM: 8610/1: V7M: Add dsb before jumping in handler mode
According to ARM AN321 (section 4.12): "If the vector table is in writable memory such as SRAM, either relocated by VTOR or a device dependent memory remapping mechanism, then architecturally a memory barrier instruction is required after the vector table entry is updated, and if the exception is to be activated immediately" Reviewed-by: Vladimir Murzin <[email protected]> Signed-off-by: Maxime Coquelin <[email protected]> Signed-off-by: Alexandre TORGUE <[email protected]> Signed-off-by: Russell King <[email protected]>
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@ -132,6 +132,7 @@ __v7m_setup_cont:
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badr r1, 1f
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ldr r5, [r12, #11 * 4] @ read the SVC vector entry
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str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
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dsb
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mov r6, lr @ save LR
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ldr sp, =init_thread_union + THREAD_START_SP
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cpsie i
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