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spi: Updates for v4.16
Quite a quiet release for SPI, there are no changes at all to the core
and not that many changes to drivers. Highlights of those driver
changes include:
- SH MSIOF support for GPIO chip selects contributed by Geert
Uytterhoeven.
- Full duplex support for a3700 contributed by Maxime Chevallier.
- Support for DMA transfers on Atmel devices that require a bounce
buffer contributed by Radu Pirea.
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Merge tag 'spi-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"Quite a quiet release for SPI, there are no changes at all to the core
and not that many changes to drivers. Highlights of those driver
changes include:
- SH MSIOF support for GPIO chip selects contributed by Geert
Uytterhoeven.
- Full duplex support for a3700 contributed by Maxime Chevallier.
- Support for DMA transfers on Atmel devices that require a bounce
buffer contributed by Radu Pirea"
* tag 'spi-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (31 commits)
spi: dw: Remove unused members from struct chip_data
spi: orion: Fix a resource leak if the optional "axi" clk is deferred
spi: a3700: Remove endianness swapping for full-duplex transfers
spi: a3700: Remove endianness swapping functions when accessing FIFOs
spi: a3700: Add full-duplex support
spi: a3700: Allow to enable or disable FIFO mode
spi: a3700: Set frequency limits at startup
spi: a3700: Clear DATA_OUT when performing a read
spi: orion: Fix clock resource by adding an optional bus clock
spi: s3c64xx: add SPDX identifier
spi: imx: do not access registers while clocks disabled
spi: atmel: Implements transfers with bounce buffer
spi: sh-msiof: Fix timeout failures for TX-only DMA transfers
spi: spi-fsl-dspi: account for const type of of_device_id.data
spi: bcm53xx: simplify reading SPI data
spi: sirf: account for const type of of_device_id.data
spi: pxa2xx: Use gpiod_put() not gpiod_free()
spi: pxa2xx: avoid redundant gpio_to_desc(desc_to_gpio()) round-trip
spi: sh-msiof: Document hardware limitations related to chip selects
spi: sh-msiof: Implement cs-gpios configuration
...
This commit is contained in:
commit
8e3264710c
21 changed files with 378 additions and 132 deletions
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@ -36,7 +36,21 @@ Required properties:
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Optional properties:
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- clocks : Must contain a reference to the functional clock.
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- num-cs : Total number of chip-selects (default is 1)
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- num-cs : Total number of chip selects (default is 1).
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Up to 3 native chip selects are supported:
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0: MSIOF_SYNC
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1: MSIOF_SS1
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2: MSIOF_SS2
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Hardware limitations related to chip selects:
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- Native chip selects are always deasserted in
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between transfers that are part of the same
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message. Use cs-gpios to work around this.
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- All slaves using native chip selects must use the
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same spi-cs-high configuration. Use cs-gpios to
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work around this.
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- When using GPIO chip selects, at least one native
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chip select must be left unused, as it will be
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driven anyway.
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- dmas : Must contain a list of two references to DMA
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specifiers, one for transmission, and one for
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reception.
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@ -27,7 +27,9 @@ The Meson SPICC is generic SPI controller for general purpose Full-Duplex
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communications with dedicated 16 words RX/TX PIO FIFOs.
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Required properties:
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- compatible: should be "amlogic,meson-gx-spicc" on Amlogic GX SoCs.
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- compatible: should be:
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"amlogic,meson-gx-spicc" on Amlogic GX and compatible SoCs.
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"amlogic,meson-axg-spicc" on Amlogic AXG and compatible SoCs
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- reg: physical base address and length of the controller registers
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- interrupts: The interrupt specifier
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- clock-names: Must contain "core"
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@ -18,8 +18,17 @@ Required properties:
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The eight register sets following the control registers refer to
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chip-select lines 0 through 7 respectively.
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- cell-index : Which of multiple SPI controllers is this.
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- clocks : pointers to the reference clocks for this device, the first
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one is the one used for the clock on the spi bus, the
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second one is optional and is the clock used for the
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functional part of the controller
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Optional properties:
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- interrupts : Is currently not used.
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- clock-names : names of used clocks, mandatory if the second clock is
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used, the name must be "core", and "axi" (the latter
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is only for Armada 7K/8K).
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Example:
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spi@10600 {
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@ -2,7 +2,7 @@ Xilinx SPI controller Device Tree Bindings
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-------------------------------------------------
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Required properties:
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- compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b"
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- compatible : Should be "xlnx,xps-spi-2.00.a", "xlnx,xps-spi-2.00.b" or "xlnx,axi-quad-spi-1.00.a"
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- reg : Physical base address and size of SPI registers map.
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- interrupts : Property with a value describing the interrupt
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number.
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