From 7bde323c183835739501a26b8fc002b40b3f3d3a Mon Sep 17 00:00:00 2001
From: "Tao,Zhang" <taozha@qti.qualcomm.com>
Date: Fri, 11 Sep 2020 17:59:00 +0800
Subject: [PATCH] ARM: dts: msm: Add llcc dcache dump nodes for shima

Add llcc_1_dcache and llcc_2_dcache dump node to support these two
registers dump.

Change-Id: I7a390633f7b24bbce828104c85e4787019ba9206
---
 qcom/shima.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index c60a2aa56528..8dde846ab102 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -3348,6 +3348,16 @@
 			qcom,dump-id = <0x102>;
 		};
 
+		LLCC_1: llcc_1_dcache {
+			qcom,dump-size = <0x1141c0>;
+			qcom,dump-id = <0x140>;
+		};
+
+		LLCC_2: llcc_2_dcache {
+			qcom,dump-size = <0x1141c0>;
+			qcom,dump-id = <0x141>;
+		};
+
 		misc_data {
 			qcom,dump-size = <0x1000>;
 			qcom,dump-id = <0xe8>;