From 8f0ed7f0a18b976686cc2e30e5258d92c806be03 Mon Sep 17 00:00:00 2001 From: Shravan Nevatia Date: Mon, 20 Jul 2020 02:59:18 +0530 Subject: [PATCH] ARM: dts: msm: Fix clock handles in sensor DTs for shima Fix camcc clock names in sensor dt nodes for shima. CRs-Fixed: 2732811 Change-Id: I101eb98754adaa954a310d4dbb84d9f5fcca75a8 --- shima-camera-sensor-idp.dtsi | 16 ++++++++-------- shima-camera-sensor-idps.dtsi | 16 ++++++++-------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/shima-camera-sensor-idp.dtsi b/shima-camera-sensor-idp.dtsi index 5a18e6d08682..5922346607e5 100644 --- a/shima-camera-sensor-idp.dtsi +++ b/shima-camera-sensor-idp.dtsi @@ -89,7 +89,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -124,7 +124,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -167,7 +167,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -209,7 +209,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -258,7 +258,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -292,7 +292,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -334,7 +334,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -374,7 +374,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; diff --git a/shima-camera-sensor-idps.dtsi b/shima-camera-sensor-idps.dtsi index 5a18e6d08682..5922346607e5 100644 --- a/shima-camera-sensor-idps.dtsi +++ b/shima-camera-sensor-idps.dtsi @@ -89,7 +89,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -124,7 +124,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -167,7 +167,7 @@ "CAM_RESET0"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clocks = <&camcc CAM_CC_MCLK0_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -209,7 +209,7 @@ "CAM_RESET1"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clocks = <&camcc CAM_CC_MCLK1_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -258,7 +258,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -292,7 +292,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -334,7 +334,7 @@ "CAM_RESET2"; cci-master = <0>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clocks = <&camcc CAM_CC_MCLK2_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>; @@ -374,7 +374,7 @@ "CAM_RESET3"; cci-master = <1>; status = "ok"; - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; clock-names = "cam_clk"; clock-cntl-level = "nominal"; clock-rates = <24000000>;