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ARM: soc: driver specific changes
- A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2 RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1 BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad 4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3 0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS HP4M96LxLHJlLGCxhEme =ck7M -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
This commit is contained in:
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162 changed files with 4908 additions and 3542 deletions
10
Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
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10
Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
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* OMAP OCP2SCP - ocp interface to scp interface
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properties:
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- compatible : Should be "ti,omap-ocp2scp"
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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- ranges : the child address space are mapped 1:1 onto the parent address space
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- ti,hwmods : must be "ocp2scp_usb_phy"
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Sub-nodes:
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All the devices connected to ocp2scp are described using sub-node to ocp2scp
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30
Documentation/devicetree/bindings/media/exynos5-gsc.txt
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Documentation/devicetree/bindings/media/exynos5-gsc.txt
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* Samsung Exynos5 G-Scaler device
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G-Scaler is used for scaling and color space conversion on EXYNOS5 SoCs.
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Required properties:
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- compatible: should be "samsung,exynos5-gsc"
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- reg: should contain G-Scaler physical address location and length.
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- interrupts: should contain G-Scaler interrupt number
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Example:
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gsc_0: gsc@0x13e00000 {
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compatible = "samsung,exynos5-gsc";
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reg = <0x13e00000 0x1000>;
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interrupts = <0 85 0>;
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};
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Aliases:
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Each G-Scaler node should have a numbered alias in the aliases node,
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in the form of gscN, N = 0...3. G-Scaler driver uses these aliases
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to retrieve the device IDs using "of_alias_get_id()" call.
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Example:
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aliases {
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gsc0 =&gsc_0;
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gsc1 =&gsc_1;
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gsc2 =&gsc_2;
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gsc3 =&gsc_3;
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};
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196
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
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Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
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Samsung GPIO and Pin Mux/Config controller
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Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
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controller. It controls the input/output settings on the available pads/pins
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and also provides ability to multiplex and configure the output of various
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on-chip controllers onto these pads.
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Required Properties:
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- compatible: should be one of the following.
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- "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller.
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- "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller.
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- reg: Base address of the pin controller hardware module and length of
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the address space it occupies.
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- interrupts: interrupt specifier for the controller. The format and value of
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the interrupt specifier depends on the interrupt parent for the controller.
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- Pin mux/config groups as child nodes: The pin mux (selecting pin function
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mode) and pin config (pull up/down, driver strength) settings are represented
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as child nodes of the pin-controller node. There should be atleast one
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child node and there is no limit on the count of these child nodes.
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The child node should contain a list of pin(s) on which a particular pin
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function selection or pin configuration (or both) have to applied. This
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list of pins is specified using the property name "samsung,pins". There
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should be atleast one pin specfied for this property and there is no upper
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limit on the count of pins that can be specified. The pins are specified
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using pin names which are derived from the hardware manual of the SoC. As
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an example, the pins in GPA0 bank of the pin controller can be represented
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as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
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The format of the pin names should be (as per the hardware manual)
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"[pin bank name]-[pin number within the bank]".
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The pin function selection that should be applied on the pins listed in the
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child node is specified using the "samsung,pin-function" property. The value
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of this property that should be applied to each of the pins listed in the
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"samsung,pins" property should be picked from the hardware manual of the SoC
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for the specified pin group. This property is optional in the child node if
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no specific function selection is desired for the pins listed in the child
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node. The value of this property is used as-is to program the pin-controller
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function selector register of the pin-bank.
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The child node can also optionally specify one or more of the pin
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configuration that should be applied on all the pins listed in the
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"samsung,pins" property of the child node. The following pin configuration
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properties are supported.
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- samsung,pin-pud: Pull up/down configuration.
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- samsung,pin-drv: Drive strength configuration.
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- samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
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- samsung,pin-drv-pdn: Drive strength configuration in power down mode.
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The values specified by these config properties should be derived from the
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hardware manual and these values are programmed as-is into the pin
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pull up/down and driver strength register of the pin-controller.
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Note: A child should include atleast a pin function selection property or
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pin configuration property (one or more) or both.
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The client nodes that require a particular pin function selection and/or
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pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
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file.
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External GPIO and Wakeup Interrupts:
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The controller supports two types of external interrupts over gpio. The first
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is the external gpio interrupt and second is the external wakeup interrupts.
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The difference between the two is that the external wakeup interrupts can be
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used as system wakeup events.
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A. External GPIO Interrupts: For supporting external gpio interrupts, the
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following properties should be specified in the pin-controller device node.
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- interrupt-controller: identifies the controller node as interrupt-parent.
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- #interrupt-cells: the value of this property should be 2.
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- First Cell: represents the external gpio interrupt number local to the
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external gpio interrupt space of the controller.
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- Second Cell: flags to identify the type of the interrupt
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- 1 = rising edge triggered
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- 2 = falling edge triggered
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- 3 = rising and falling edge triggered
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- 4 = high level triggered
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- 8 = low level triggered
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B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
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child node representing the external wakeup interrupt controller should be
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included in the pin-controller device node. This child node should include
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the following properties.
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- compatible: identifies the type of the external wakeup interrupt controller
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The possible values are:
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- samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
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found on Samsung Exynos4210 SoC.
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- interrupt-parent: phandle of the interrupt parent to which the external
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wakeup interrupts are forwarded to.
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- interrupt-controller: identifies the node as interrupt-parent.
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- #interrupt-cells: the value of this property should be 2
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- First Cell: represents the external wakeup interrupt number local to
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the external wakeup interrupt space of the controller.
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- Second Cell: flags to identify the type of the interrupt
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- 1 = rising edge triggered
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- 2 = falling edge triggered
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- 3 = rising and falling edge triggered
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- 4 = high level triggered
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- 8 = low level triggered
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Aliases:
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All the pin controller nodes should be represented in the aliases node using
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the following format 'pinctrl{n}' where n is a unique number for the alias.
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Example 1: A pin-controller node with pin groups.
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,pinctrl-exynos4210";
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reg = <0x11400000 0x1000>;
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interrupts = <0 47 0>;
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uart0_data: uart0-data {
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samsung,pins = "gpa0-0", "gpa0-1";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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uart0_fctl: uart0-fctl {
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samsung,pins = "gpa0-2", "gpa0-3";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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uart1_data: uart1-data {
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samsung,pins = "gpa0-4", "gpa0-5";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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uart1_fctl: uart1-fctl {
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samsung,pins = "gpa0-6", "gpa0-7";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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i2c2_bus: i2c2-bus {
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samsung,pins = "gpa0-6", "gpa0-7";
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samsung,pin-function = <3>;
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samsung,pin-pud = <3>;
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samsung,pin-drv = <0>;
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};
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};
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Example 2: A pin-controller node with external wakeup interrupt controller node.
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,pinctrl-exynos4210";
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reg = <0x11000000 0x1000>;
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interrupts = <0 46 0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakup_eint: wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
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<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
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<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
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<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
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<0 32 0>;
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};
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};
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Example 3: A uart client node that supports 'default' and 'flow-control' states.
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uart@13800000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13800000 0x100>;
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interrupts = <0 52 0>;
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pinctrl-names = "default", "flow-control;
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pinctrl-0 = <&uart0_data>;
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pinctrl-1 = <&uart0_data &uart0_fctl>;
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};
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Example 4: Set up the default pin state for uart controller.
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static int s3c24xx_serial_probe(struct platform_device *pdev) {
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struct pinctrl *pinctrl;
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...
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...
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pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
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}
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