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IRQCHIP: irq-mips-gic: Add new functions to start/stop the GIC counter
We add new functions to start and stop the GIC counter since there are no guarantees the counter will be running after a CPU reset. The GIC counter is stopped by setting the 29th bit on the GIC Config register and it is started by clearing that bit. Signed-off-by: Markos Chandras <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Andrew Bresticker <[email protected]> Cc: Qais Yousef <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9594/ Signed-off-by: Ralf Baechle <[email protected]>
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2 changed files with 23 additions and 0 deletions
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@ -166,6 +166,27 @@ cycle_t gic_read_compare(void)
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return (((cycle_t) hi) << 32) + lo;
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}
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void gic_start_count(void)
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{
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u32 gicconfig;
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/* Start the counter */
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gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
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gicconfig &= ~(1 << GIC_SH_CONFIG_COUNTSTOP_SHF);
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gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
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}
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void gic_stop_count(void)
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{
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u32 gicconfig;
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/* Stop the counter */
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gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
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gicconfig |= 1 << GIC_SH_CONFIG_COUNTSTOP_SHF;
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gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
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}
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#endif
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static bool gic_local_irq_is_routable(int intr)
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