mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-06 03:45:24 -04:00
This is the 5.4.49 stable release
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Merge 5.4.49 into android-5.4-stable
Changes in 5.4.49
power: supply: bq24257_charger: Replace depends on REGMAP_I2C with select
clk: sunxi: Fix incorrect usage of round_down()
ASoC: tegra: tegra_wm8903: Support nvidia, headset property
i2c: piix4: Detect secondary SMBus controller on AMD AM4 chipsets
ASoC: SOF: imx8: Fix randbuild error
iio: pressure: bmp280: Tolerate IRQ before registering
remoteproc: Fix IDR initialisation in rproc_alloc()
clk: qcom: msm8916: Fix the address location of pll->config_reg
ASoC: fsl_esai: Disable exception interrupt before scheduling tasklet
backlight: lp855x: Ensure regulators are disabled on probe failure
ARM: dts: renesas: Fix IOMMU device node names
ASoC: davinci-mcasp: Fix dma_chan refcnt leak when getting dma type
ARM: integrator: Add some Kconfig selections
ARM: dts: stm32: Add missing ethernet PHY reset on AV96
scsi: core: free sgtables in case command setup fails
scsi: qedi: Check for buffer overflow in qedi_set_path()
arm64: dts: meson: fixup SCP sram nodes
ALSA: hda/realtek - Introduce polarity for micmute LED GPIO
ALSA: isa/wavefront: prevent out of bounds write in ioctl
PCI: Allow pci_resize_resource() for devices on root bus
scsi: qla2xxx: Fix issue with adapter's stopping state
Input: edt-ft5x06 - fix get_default register write access
powerpc/kasan: Fix stack overflow by increasing THREAD_SHIFT
rtc: mc13xxx: fix a double-unlock issue
iio: bmp280: fix compensation of humidity
f2fs: report delalloc reserve as non-free in statfs for project quota
i2c: pxa: clear all master action bits in i2c_pxa_stop_message()
remoteproc: qcom_q6v5_mss: map/unmap mpss segments before/after use
clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical
usblp: poison URBs upon disconnect
serial: 8250: Fix max baud limit in generic 8250 port
misc: fastrpc: Fix an incomplete memory release in fastrpc_rpmsg_probe()
misc: fastrpc: fix potential fastrpc_invoke_ctx leak
dm mpath: switch paths in dm_blk_ioctl() code path
arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposes
arm64: dts: armada-3720-turris-mox: fix SFP binding
arm64: dts: juno: Fix GIC child nodes
pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
ASoC: SOF: Do nothing when DSP PM callbacks are not set
arm64: dts: fvp: Fix GIC child nodes
PCI: aardvark: Don't blindly enable ASPM L0s and don't write to read-only register
ps3disk: use the default segment boundary
arm64: dts: fvp/juno: Fix node address fields
vfio/pci: fix memory leaks in alloc_perm_bits()
coresight: tmc: Fix TMC mode read in tmc_read_prepare_etb()
RDMA/mlx5: Add init2init as a modify command
scsi: hisi_sas: Do not reset phy timer to wait for stray phy up
PCI: pci-bridge-emul: Fix PCIe bit conflicts
m68k/PCI: Fix a memory leak in an error handling path
gpio: dwapb: Call acpi_gpiochip_free_interrupts() on GPIO chip de-registration
usb: gadget: core: sync interrupt before unbind the udc
powerpc/ptdump: Add _PAGE_COHERENT flag
mfd: wm8994: Fix driver operation if loaded as modules
scsi: cxgb3i: Fix some leaks in init_act_open()
clk: zynqmp: fix memory leak in zynqmp_register_clocks
scsi: lpfc: Fix lpfc_nodelist leak when processing unsolicited event
scsi: vhost: Notify TCM about the maximum sg entries supported per command
clk: clk-flexgen: fix clock-critical handling
IB/mlx5: Fix DEVX support for MLX5_CMD_OP_INIT2INIT_QP command
powerpc/perf/hv-24x7: Fix inconsistent output values incase multiple hv-24x7 events run
nfsd: Fix svc_xprt refcnt leak when setup callback client failed
PCI: vmd: Filter resource type bits from shadow register
RDMA/core: Fix several reference count leaks.
cifs: set up next DFS target before generic_ip_connect()
ASoC: qcom: q6asm-dai: kCFI fix
powerpc/crashkernel: Take "mem=" option into account
pwm: img: Call pm_runtime_put() in pm_runtime_get_sync() failed case
sparc32: mm: Don't try to free page-table pages if ctor() fails
yam: fix possible memory leak in yam_init_driver
NTB: ntb_pingpong: Choose doorbells based on port number
NTB: Fix the default port and peer numbers for legacy drivers
mksysmap: Fix the mismatch of '.L' symbols in System.map
apparmor: fix introspection of of task mode for unconfined tasks
net: dsa: lantiq_gswip: fix and improve the unsupported interface error
apparmor: check/put label on apparmor_sk_clone_security()
f2fs: handle readonly filesystem in f2fs_ioc_shutdown()
ASoC: meson: add missing free_irq() in error path
bpf, sockhash: Fix memory leak when unlinking sockets in sock_hash_free
scsi: sr: Fix sr_probe() missing deallocate of device minor
scsi: ibmvscsi: Don't send host info in adapter info MAD after LPM
apparmor: fix nnp subset test for unconfined
x86/purgatory: Disable various profiling and sanitizing options
staging: greybus: fix a missing-check bug in gb_lights_light_config()
arm64: dts: mt8173: fix unit name warnings
scsi: qedi: Do not flush offload work if ARP not resolved
arm64: dts: qcom: msm8916: remove unit name for thermal trip points
ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarity
RDMA/mlx5: Fix udata response upon SRQ creation
gpio: dwapb: Append MODULE_ALIAS for platform driver
scsi: qedf: Fix crash when MFW calls for protocol stats while function is still probing
pinctrl: rza1: Fix wrong array assignment of rza1l_swio_entries
virtiofs: schedule blocking async replies in separate worker
arm64: dts: qcom: fix pm8150 gpio interrupts
firmware: qcom_scm: fix bogous abuse of dma-direct internals
staging: gasket: Fix mapping refcnt leak when put attribute fails
staging: gasket: Fix mapping refcnt leak when register/store fails
ALSA: usb-audio: Improve frames size computation
ALSA: usb-audio: Fix racy list management in output queue
s390/qdio: put thinint indicator after early error
tty: hvc: Fix data abort due to race in hvc_open
slimbus: ngd: get drvdata from correct device
clk: meson: meson8b: Fix the first parent of vid_pll_in_sel
clk: meson: meson8b: Fix the polarity of the RESET_N lines
clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits
gpio: pca953x: fix handling of automatic address incrementing
thermal/drivers/ti-soc-thermal: Avoid dereferencing ERR_PTR
clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers
ASoC: max98373: reorder max98373_reset() in resume
soundwire: slave: don't init debugfs on device registration error
HID: intel-ish-hid: avoid bogus uninitialized-variable warning
usb: dwc3: gadget: Properly handle ClearFeature(halt)
usb: dwc3: gadget: Properly handle failed kick_transfer
staging: wilc1000: Increase the size of wid_list array
staging: sm750fb: add missing case while setting FB_VISUAL
PCI: v3-semi: Fix a memory leak in v3_pci_probe() error handling paths
i2c: pxa: fix i2c_pxa_scream_blue_murder() debug output
serial: amba-pl011: Make sure we initialize the port.lock spinlock
drivers: base: Fix NULL pointer exception in __platform_driver_probe() if a driver developer is foolish
PCI: rcar: Fix incorrect programming of OB windows
PCI/ASPM: Allow ASPM on links to PCIe-to-PCI/PCI-X Bridges
scsi: qla2xxx: Fix warning after FC target reset
ALSA: firewire-lib: fix invalid assignment to union data for directional parameter
power: supply: lp8788: Fix an error handling path in 'lp8788_charger_probe()'
power: supply: smb347-charger: IRQSTAT_D is volatile
ASoC: SOF: core: fix error return code in sof_probe_continue()
arm64: dts: msm8996: Fix CSI IRQ types
scsi: target: loopback: Fix READ with data and sensebytes
scsi: mpt3sas: Fix double free warnings
SoC: rsnd: add interrupt support for SSI BUSIF buffer
ASoC: ux500: mop500: Fix some refcounted resources issues
ASoC: ti: omap-mcbsp: Fix an error handling path in 'asoc_mcbsp_probe()'
pinctrl: rockchip: fix memleak in rockchip_dt_node_to_map
dlm: remove BUG() before panic()
USB: ohci-sm501: fix error return code in ohci_hcd_sm501_drv_probe()
clk: ti: composite: fix memory leak
PCI: Fix pci_register_host_bridge() device_register() error handling
powerpc/64: Don't initialise init_task->thread.regs
tty: n_gsm: Fix SOF skipping
tty: n_gsm: Fix waking up upper tty layer when room available
ALSA: usb-audio: Add duplex sound support for USB devices using implicit feedback
HID: Add quirks for Trust Panora Graphic Tablet
PCI/PM: Assume ports without DLL Link Active train links in 100 ms
habanalabs: increase timeout during reset
ipmi: use vzalloc instead of kmalloc for user creation
powerpc/64s/exception: Fix machine check no-loss idle wakeup
powerpc/pseries/ras: Fix FWNMI_VALID off by one
drivers: phy: sr-usb: do not use internal fsm for USB2 phy init
powerpc/ps3: Fix kexec shutdown hang
vfio-pci: Mask cap zero
usb/ohci-platform: Fix a warning when hibernating
drm/msm/mdp5: Fix mdp5_init error path for failed mdp5_kms allocation
ASoC: Intel: bytcr_rt5640: Add quirk for Toshiba Encore WT8-A tablet
USB: host: ehci-mxc: Add error handling in ehci_mxc_drv_probe()
tty: n_gsm: Fix bogus i++ in gsm_data_kick
fpga: dfl: afu: Corrected error handling levels
clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1
RDMA/hns: Bugfix for querying qkey
RDMA/hns: Fix cmdq parameter of querying pf timer resource
scsi: target: tcmu: Userspace must not complete queued commands
firmware: imx: scu: Fix possible memory leak in imx_scu_probe()
fuse: fix copy_file_range cache issues
fuse: copy_file_range should truncate cache
arm64: tegra: Fix ethernet phy-mode for Jetson Xavier
arm64: tegra: Fix flag for 64-bit resources in 'ranges' property
powerpc/64s/pgtable: fix an undefined behaviour
dm zoned: return NULL if dmz_get_zone_for_reclaim() fails to find a zone
PCI/PTM: Inherit Switch Downstream Port PTM settings from Upstream Port
PCI: dwc: Fix inner MSI IRQ domain registration
PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
IB/cma: Fix ports memory leak in cma_configfs
watchdog: da9062: No need to ping manually before setting timeout
usb: dwc2: gadget: move gadget resume after the core is in L0 state
USB: gadget: udc: s3c2410_udc: Remove pointless NULL check in s3c2410_udc_nuke
usb: gadget: lpc32xx_udc: don't dereference ep pointer before null check
usb: gadget: fix potential double-free in m66592_probe.
usb: gadget: Fix issue with config_ep_by_speed function
scripts: headers_install: Exit with error on config leak
RDMA/iw_cxgb4: cleanup device debugfs entries on ULD remove
x86/apic: Make TSC deadline timer detection message visible
mfd: stmfx: Reset chip on resume as supply was disabled
mfd: stmfx: Fix stmfx_irq_init error path
mfd: stmfx: Disable IRQ in suspend to avoid spurious interrupt
powerpc/32s: Don't warn when mapping RO data ROX.
ASoC: fix incomplete error-handling in img_i2s_in_probe.
scsi: target: tcmu: Fix a use after free in tcmu_check_expired_queue_cmd()
clk: bcm2835: Fix return type of bcm2835_register_gate
scsi: ufs-qcom: Fix scheduling while atomic issue
KVM: PPC: Book3S HV: Ignore kmemleak false positives
KVM: PPC: Book3S: Fix some RCU-list locks
clk: sprd: return correct type of value for _sprd_pll_recalc_rate
clk: ast2600: Fix AHB clock divider for A1
misc: xilinx-sdfec: improve get_user_pages_fast() error handling
/dev/mem: Revoke mappings when a driver claims the region
net: sunrpc: Fix off-by-one issues in 'rpc_ntop6'
NFSv4.1 fix rpc_call_done assignment for BIND_CONN_TO_SESSION
of: Fix a refcounting bug in __of_attach_node_sysfs()
input: i8042 - Remove special PowerPC handling
powerpc/4xx: Don't unmap NULL mbase
extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
ASoC: fsl_asrc_dma: Fix dma_chan leak when config DMA channel failed
vfio/mdev: Fix reference count leak in add_mdev_supported_type
rtc: rv3028: Add missed check for devm_regmap_init_i2c()
mailbox: zynqmp-ipi: Fix NULL vs IS_ERR() check in zynqmp_ipi_mbox_probe()
rxrpc: Adjust /proc/net/rxrpc/calls to display call->debug_id not user_ID
openrisc: Fix issue with argument clobbering for clone/fork
drm/nouveau/disp/gm200-: fix NV_PDISP_SOR_HDMI2_CTRL(n) selection
ceph: don't return -ESTALE if there's still an open file
nfsd4: make drc_slab global, not per-net
gfs2: Allow lock_nolock mount to specify jid=X
scsi: iscsi: Fix reference count leak in iscsi_boot_create_kobj
scsi: ufs: Don't update urgent bkops level when toggling auto bkops
pinctrl: imxl: Fix an error handling path in 'imx1_pinctrl_core_probe()'
pinctrl: freescale: imx: Fix an error handling path in 'imx_pinctrl_probe()'
nfsd: safer handling of corrupted c_type
drm/amd/display: Revalidate bandwidth before commiting DC updates
crypto: omap-sham - add proper load balancing support for multicore
geneve: change from tx_error to tx_dropped on missing metadata
lib/zlib: remove outdated and incorrect pre-increment optimization
include/linux/bitops.h: avoid clang shift-count-overflow warnings
selftests/vm/pkeys: fix alloc_random_pkey() to make it really random
blktrace: use errno instead of bi_status
blktrace: fix endianness in get_pdu_int()
blktrace: fix endianness for blk_log_remap()
gfs2: fix use-after-free on transaction ail lists
net: marvell: Fix OF_MDIO config check
ntb_perf: pass correct struct device to dma_alloc_coherent
ntb_tool: pass correct struct device to dma_alloc_coherent
NTB: ntb_tool: reading the link file should not end in a NULL byte
NTB: Revert the change to use the NTB device dev for DMA allocations
NTB: perf: Don't require one more memory window than number of peers
NTB: perf: Fix support for hardware that doesn't have port numbers
NTB: perf: Fix race condition when run with ntb_test
NTB: ntb_test: Fix bug when counting remote files
i2c: icy: Fix build with CONFIG_AMIGA_PCMCIA=n
drivers/perf: hisi: Fix wrong value for all counters enable
selftests/net: in timestamping, strncpy needs to preserve null byte
f2fs: don't return vmalloc() memory from f2fs_kmalloc()
afs: Fix memory leak in afs_put_sysnames()
ASoC: core: only convert non DPCM link to DPCM link
ASoC: SOF: nocodec: conditionally set dpcm_capture/dpcm_playback flags
ASoC: Intel: bytcr_rt5640: Add quirk for Toshiba Encore WT10-A tablet
ASoC: rt5645: Add platform-data for Asus T101HA
bpf/sockmap: Fix kernel panic at __tcp_bpf_recvmsg
bpf, sockhash: Synchronize delete from bucket list on map free
tracing/probe: Fix bpf_task_fd_query() for kprobes and uprobes
drm/sun4i: hdmi ddc clk: Fix size of m divider
libbpf: Handle GCC noreturn-turned-volatile quirk
scsi: acornscsi: Fix an error handling path in acornscsi_probe()
x86/idt: Keep spurious entries unset in system_vectors
net/filter: Permit reading NET in load_bytes_relative when MAC not set
nvme-pci: use simple suspend when a HMB is enabled
nfs: set invalid blocks after NFSv4 writes
xdp: Fix xsk_generic_xmit errno
iavf: fix speed reporting over virtchnl
bpf: Fix memlock accounting for sock_hash
usb/xhci-plat: Set PM runtime as active on resume
usb: host: ehci-platform: add a quirk to avoid stuck
usb/ehci-platform: Set PM runtime as active on resume
perf report: Fix NULL pointer dereference in hists__fprintf_nr_sample_events()
perf stat: Fix NULL pointer dereference
ext4: stop overwrite the errcode in ext4_setup_super
bcache: fix potential deadlock problem in btree_gc_coalesce
powerpc: Fix kernel crash in show_instructions() w/DEBUG_VIRTUAL
afs: Fix non-setting of mtime when writing into mmap
afs: afs_write_end() should change i_size under the right lock
afs: Fix EOF corruption
afs: Always include dir in bulk status fetch from afs_do_lookup()
afs: Set error flag rather than return error from file status decode
afs: Fix the mapping of the UAEOVERFLOW abort code
bnxt_en: Return from timer if interface is not in open state.
scsi: ufs-bsg: Fix runtime PM imbalance on error
block: Fix use-after-free in blkdev_get()
mvpp2: remove module bugfix
arm64: hw_breakpoint: Don't invoke overflow handler on uaccess watchpoints
libata: Use per port sync for detach
drm: encoder_slave: fix refcouting error for modules
ext4: fix partial cluster initialization when splitting extent
ext4: avoid utf8_strncasecmp() with unstable name
drm/dp_mst: Reformat drm_dp_check_act_status() a bit
drm/qxl: Use correct notify port address when creating cursor ring
drm/amdgpu: Replace invalid device ID with a valid device ID
selinux: fix double free
jbd2: clean __jbd2_journal_abort_hard() and __journal_abort_soft()
ext4: avoid race conditions when remounting with options that change dax
drm/dp_mst: Increase ACT retry timeout to 3s
drm/amd/display: Use swap() where appropriate
x86/boot/compressed: Relax sed symbol type regex for LLVM ld.lld
block: nr_sects_write(): Disable preemption on seqcount write
net/mlx5: DR, Fix freeing in dr_create_rc_qp()
f2fs: split f2fs_d_compare() from f2fs_match_name()
f2fs: avoid utf8_strncasecmp() with unstable name
s390: fix syscall_get_error for compat processes
drm/i915: Fix AUX power domain toggling across TypeC mode resets
drm/msm: Check for powered down HW in the devfreq callbacks
drm/i915/gem: Avoid iterating an empty list
drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
drm/connector: notify userspace on hotplug after register complete
drm/amd/display: Use kvfree() to free coeff in build_regamma()
drm/i915/icl+: Fix hotplug interrupt disabling after storm detection
Revert "drm/amd/display: disable dcn20 abm feature for bring up"
crypto: algif_skcipher - Cap recv SG list at ctx->used
crypto: algboss - don't wait during notifier callback
tracing/probe: Fix memleak in fetch_op_data operations
kprobes: Fix to protect kick_kprobe_optimizer() by kprobe_mutex
kretprobe: Prevent triggering kretprobe from within kprobe_flush_task
e1000e: Do not wake up the system via WOL if device wakeup is disabled
net: octeon: mgmt: Repair filling of RX ring
pwm: jz4740: Enhance precision in calculation of duty cycle
sched/rt, net: Use CONFIG_PREEMPTION.patch
net: core: device_rename: Use rwsem instead of a seqcount
Linux 5.4.49
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I93723d3c14b5de06aafb4e59a9e35a1d74389757
This commit is contained in:
Greg Kroah-Hartman
commit
90dbaed65a
323 changed files with 2882 additions and 1600 deletions
2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 48
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SUBLEVEL = 49
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@ -338,7 +338,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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@ -348,7 +348,7 @@
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status = "disabled";
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};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -357,7 +357,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -367,7 +367,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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@ -376,7 +376,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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@ -386,7 +386,7 @@
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status = "disabled";
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};
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ipmmu_gp: mmu@e62a0000 {
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ipmmu_gp: iommu@e62a0000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe62a0000 0 0x1000>;
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@ -338,7 +338,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -348,7 +348,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -357,7 +357,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -367,7 +367,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -376,7 +376,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -386,7 +386,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7744",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@
|
|||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -312,7 +312,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -321,7 +321,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -331,7 +331,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -340,7 +340,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -350,7 +350,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7745",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -427,7 +427,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -437,7 +437,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -446,7 +446,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -456,7 +456,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -465,7 +465,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -475,7 +475,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -350,7 +350,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -360,7 +360,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -369,7 +369,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -379,7 +379,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -388,7 +388,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -398,7 +398,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
@ -407,7 +407,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -336,7 +336,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -346,7 +346,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -355,7 +355,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -365,7 +365,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -374,7 +374,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -384,7 +384,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
@ -393,7 +393,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -290,7 +290,7 @@
|
|||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -300,7 +300,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -309,7 +309,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -319,7 +319,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -328,7 +328,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -338,7 +338,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -91,6 +91,9 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <1000>;
|
||||
|
||||
phy0: ethernet-phy@7 {
|
||||
reg = <7>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
pwr_led {
|
||||
label = "bananapi-m2-zero:red:pwr";
|
||||
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
|
||||
gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
|
||||
nor_flash: flash@0,00000000 {
|
||||
nor_flash: flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>,
|
||||
<4 0x00000000 0x04000000>;
|
||||
|
|
@ -41,13 +41,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
psram@1,00000000 {
|
||||
psram@100000000 {
|
||||
compatible = "arm,vexpress-psram", "mtd-ram";
|
||||
reg = <1 0x00000000 0x02000000>;
|
||||
bank-width = <4>;
|
||||
};
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
|
@ -59,14 +59,14 @@
|
|||
vddvario-supply = <&v2m_fixed_3v3>;
|
||||
};
|
||||
|
||||
usb@2,03000000 {
|
||||
usb@203000000 {
|
||||
compatible = "nxp,usb-isp1761";
|
||||
reg = <2 0x03000000 0x20000>;
|
||||
interrupts = <16>;
|
||||
port1-otg;
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -4,6 +4,8 @@ menuconfig ARCH_INTEGRATOR
|
|||
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6
|
||||
select ARM_AMBA
|
||||
select COMMON_CLK_VERSATILE
|
||||
select CMA
|
||||
select DMA_CMA
|
||||
select HAVE_TCM
|
||||
select ICST
|
||||
select MFD_SYSCON
|
||||
|
|
@ -35,14 +37,13 @@ config INTEGRATOR_IMPD1
|
|||
select ARM_VIC
|
||||
select GPIO_PL061
|
||||
select GPIOLIB
|
||||
select REGULATOR
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
help
|
||||
The IM-PD1 is an add-on logic module for the Integrator which
|
||||
allows ARM(R) Ltd PrimeCells to be developed and evaluated.
|
||||
The IM-PD1 can be found on the Integrator/PP2 platform.
|
||||
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called impd1.
|
||||
|
||||
config INTEGRATOR_CM7TDMI
|
||||
bool "Integrator/CM7TDMI core module"
|
||||
depends on ARCH_INTEGRATOR_AP
|
||||
|
|
|
|||
|
|
@ -1728,18 +1728,18 @@
|
|||
};
|
||||
|
||||
sram: sram@fffc0000 {
|
||||
compatible = "amlogic,meson-axg-sram", "mmio-sram";
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x0 0xfffc0000 0x0 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0xfffc0000 0x20000>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@13000 {
|
||||
cpu_scp_lpri: scp-sram@13000 {
|
||||
compatible = "amlogic,meson-axg-scp-shmem";
|
||||
reg = <0x13000 0x400>;
|
||||
};
|
||||
|
||||
cpu_scp_hpri: scp-shmem@13400 {
|
||||
cpu_scp_hpri: scp-sram@13400 {
|
||||
compatible = "amlogic,meson-axg-scp-shmem";
|
||||
reg = <0x13400 0x400>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -345,20 +345,20 @@
|
|||
};
|
||||
|
||||
sram: sram@c8000000 {
|
||||
compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x0 0xc8000000 0x0 0x14000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0xc8000000 0x14000>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@0 {
|
||||
compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
|
||||
cpu_scp_lpri: scp-sram@0 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13000 0x400>;
|
||||
};
|
||||
|
||||
cpu_scp_hpri: scp-shmem@200 {
|
||||
compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
|
||||
cpu_scp_hpri: scp-sram@200 {
|
||||
compatible = "amlogic,meson-gxbb-scp-shmem";
|
||||
reg = <0x13400 0x400>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
gic: interrupt-controller@2c001000 {
|
||||
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x0 0x2c001000 0 0x1000>,
|
||||
<0x0 0x2c002000 0 0x2000>,
|
||||
|
|
|
|||
|
|
@ -8,9 +8,9 @@
|
|||
gic: interrupt-controller@2f000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x2f000000 0x100000>;
|
||||
interrupt-controller;
|
||||
reg = <0x0 0x2f000000 0x0 0x10000>,
|
||||
<0x0 0x2f100000 0x0 0x200000>,
|
||||
|
|
@ -22,7 +22,7 @@
|
|||
its: its@2f020000 {
|
||||
compatible = "arm,gic-v3-its";
|
||||
msi-controller;
|
||||
reg = <0x0 0x2f020000 0x0 0x20000>;
|
||||
reg = <0x20000 0x20000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -107,51 +107,51 @@
|
|||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 13 &gic 0 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 14 &gic 0 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 15 &gic 0 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 16 &gic 0 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 17 &gic 0 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 18 &gic 0 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 19 &gic 0 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 20 &gic 0 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 21 &gic 0 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 22 &gic 0 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 23 &gic 0 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 24 &gic 0 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 25 &gic 0 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 26 &gic 0 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 27 &gic 0 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 28 &gic 0 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 29 &gic 0 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 30 &gic 0 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 31 &gic 0 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 32 &gic 0 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 33 &gic 0 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 34 &gic 0 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 35 &gic 0 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 36 &gic 0 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 37 &gic 0 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 38 &gic 0 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 39 &gic 0 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 40 &gic 0 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 13 &gic 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 14 &gic 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 15 &gic 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 16 &gic 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 17 &gic 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 18 &gic 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 19 &gic 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 20 &gic 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 21 &gic 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 22 &gic 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 23 &gic 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 24 &gic 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 25 &gic 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 26 &gic 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 27 &gic 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 28 &gic 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 29 &gic 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 30 &gic 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 31 &gic 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 32 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 33 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 34 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 35 &gic 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 36 &gic 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 37 &gic 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 38 &gic 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 39 &gic 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 40 &gic 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 41 &gic 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
|
@ -178,7 +178,7 @@
|
|||
clock-output-names = "v2m:refclk32khz";
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -62,35 +62,35 @@
|
|||
<0x0 0x2c02f000 0 0x2000>,
|
||||
<0x0 0x2c04f000 0 0x2000>,
|
||||
<0x0 0x2c06f000 0 0x2000>;
|
||||
#address-cells = <2>;
|
||||
#address-cells = <1>;
|
||||
#interrupt-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
ranges = <0 0 0 0x2c1c0000 0 0x40000>;
|
||||
ranges = <0 0 0x2c1c0000 0x40000>;
|
||||
|
||||
v2m_0: v2m@0 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0 0 0x10000>;
|
||||
reg = <0 0x10000>;
|
||||
};
|
||||
|
||||
v2m@10000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x10000 0 0x10000>;
|
||||
reg = <0x10000 0x10000>;
|
||||
};
|
||||
|
||||
v2m@20000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x20000 0 0x10000>;
|
||||
reg = <0x20000 0x10000>;
|
||||
};
|
||||
|
||||
v2m@30000 {
|
||||
compatible = "arm,gic-v2m-frame";
|
||||
msi-controller;
|
||||
reg = <0 0x30000 0 0x10000>;
|
||||
reg = <0x30000 0x10000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -519,10 +519,10 @@
|
|||
<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &gic 0 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &gic 0 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &gic 0 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
|
||||
msi-parent = <&v2m_0>;
|
||||
status = "disabled";
|
||||
iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
|
||||
|
|
@ -786,19 +786,19 @@
|
|||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 15>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
site2: tlx@60000000 {
|
||||
|
|
@ -808,6 +808,6 @@
|
|||
ranges = <0 0 0x60000000 0x10000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0>;
|
||||
interrupt-map = <0 0 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -103,7 +103,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
flash@0,00000000 {
|
||||
flash@0 {
|
||||
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>;
|
||||
|
|
@ -120,7 +120,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
ethernet@2,00000000 {
|
||||
ethernet@200000000 {
|
||||
compatible = "smsc,lan9118", "smsc,lan9115";
|
||||
reg = <2 0x00000000 0x10000>;
|
||||
interrupts = <3>;
|
||||
|
|
@ -133,7 +133,7 @@
|
|||
vddvario-supply = <&mb_fixed_3v3>;
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
motherboard {
|
||||
arm,v2m-memory-map = "rs2";
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
virtio-p9@140000 {
|
||||
compatible = "virtio,mmio";
|
||||
reg = <0x140000 0x200>;
|
||||
|
|
|
|||
|
|
@ -17,14 +17,14 @@
|
|||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
|
||||
flash@0,00000000 {
|
||||
flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>,
|
||||
<4 0x00000000 0x04000000>;
|
||||
bank-width = <4>;
|
||||
};
|
||||
|
||||
ethernet@2,02000000 {
|
||||
ethernet@202000000 {
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <2 0x02000000 0x10000>;
|
||||
interrupts = <15>;
|
||||
|
|
@ -51,7 +51,7 @@
|
|||
clock-output-names = "v2m:refclk32khz";
|
||||
};
|
||||
|
||||
iofpga@3,00000000 {
|
||||
iofpga@300000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@
|
|||
};
|
||||
|
||||
sfp: sfp {
|
||||
compatible = "sff,sfp+";
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>;
|
||||
|
|
@ -171,6 +171,8 @@
|
|||
marvell,pad-type = "sd";
|
||||
vqmmc-supply = <&vsdio_reg>;
|
||||
mmc-pwrseq = <&sdhci1_pwrseq>;
|
||||
/* forbid SDR104 for FCC purposes */
|
||||
sdhci-caps-mask = <0x2 0x0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -238,21 +238,21 @@
|
|||
cpu_on = <0x84000003>;
|
||||
};
|
||||
|
||||
clk26m: oscillator@0 {
|
||||
clk26m: oscillator0 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <26000000>;
|
||||
clock-output-names = "clk26m";
|
||||
};
|
||||
|
||||
clk32k: oscillator@1 {
|
||||
clk32k: oscillator1 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32000>;
|
||||
clock-output-names = "clk32k";
|
||||
};
|
||||
|
||||
cpum_ck: oscillator@2 {
|
||||
cpum_ck: oscillator2 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
|
|
@ -268,19 +268,19 @@
|
|||
sustainable-power = <1500>; /* milliwatts */
|
||||
|
||||
trips {
|
||||
threshold: trip-point@0 {
|
||||
threshold: trip-point0 {
|
||||
temperature = <68000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
target: trip-point@1 {
|
||||
target: trip-point1 {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit: cpu_crit@0 {
|
||||
cpu_crit: cpu_crit0 {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
|
|
@ -288,13 +288,13 @@
|
|||
};
|
||||
|
||||
cooling-maps {
|
||||
map@0 {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu0 0 0>,
|
||||
<&cpu1 0 0>;
|
||||
contribution = <3072>;
|
||||
};
|
||||
map@1 {
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu2 0 0>,
|
||||
<&cpu3 0 0>;
|
||||
|
|
@ -308,7 +308,7 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
vpu_dma_reserved: vpu_dma_mem_region {
|
||||
vpu_dma_reserved: vpu_dma_mem_region@b7000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0 0xb7000000 0 0x500000>;
|
||||
alignment = <0x1000>;
|
||||
|
|
@ -360,7 +360,7 @@
|
|||
reg = <0 0x10005000 0 0x1000>;
|
||||
};
|
||||
|
||||
pio: pinctrl@10005000 {
|
||||
pio: pinctrl@1000b000 {
|
||||
compatible = "mediatek,mt8173-pinctrl";
|
||||
reg = <0 0x1000b000 0 0x1000>;
|
||||
mediatek,pctl-regmap = <&syscfg_pctl_a>;
|
||||
|
|
@ -567,7 +567,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@10220000 {
|
||||
gic: interrupt-controller@10221000 {
|
||||
compatible = "arm,gic-400";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@
|
|||
|
||||
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
|
||||
phy-handle = <&phy>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -1192,7 +1192,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
|
||||
};
|
||||
|
||||
|
|
@ -1238,7 +1238,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
|
||||
};
|
||||
|
||||
|
|
@ -1284,7 +1284,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
|
||||
0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
|
||||
};
|
||||
|
||||
|
|
@ -1330,7 +1330,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
|
||||
};
|
||||
|
||||
|
|
@ -1376,7 +1376,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
|
||||
};
|
||||
|
||||
|
|
@ -1426,7 +1426,7 @@
|
|||
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */
|
||||
0xc2000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
|
||||
0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -212,7 +212,7 @@
|
|||
thermal-sensors = <&tsens 3>;
|
||||
|
||||
trips {
|
||||
cpu2_3_alert0: trip-point@0 {
|
||||
cpu2_3_alert0: trip-point0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
|
|
@ -242,7 +242,7 @@
|
|||
thermal-sensors = <&tsens 2>;
|
||||
|
||||
trips {
|
||||
gpu_alert0: trip-point@0 {
|
||||
gpu_alert0: trip-point0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
|
|
@ -262,7 +262,7 @@
|
|||
thermal-sensors = <&tsens 1>;
|
||||
|
||||
trips {
|
||||
cam_alert0: trip-point@0 {
|
||||
cam_alert0: trip-point0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
|
|
@ -277,7 +277,7 @@
|
|||
thermal-sensors = <&tsens 0>;
|
||||
|
||||
trips {
|
||||
modem_alert0: trip-point@0 {
|
||||
modem_alert0: trip-point0 {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
|
|
|
|||
|
|
@ -1681,16 +1681,16 @@
|
|||
"csi_clk_mux",
|
||||
"vfe0",
|
||||
"vfe1";
|
||||
interrupts = <GIC_SPI 78 0>,
|
||||
<GIC_SPI 79 0>,
|
||||
<GIC_SPI 80 0>,
|
||||
<GIC_SPI 296 0>,
|
||||
<GIC_SPI 297 0>,
|
||||
<GIC_SPI 298 0>,
|
||||
<GIC_SPI 299 0>,
|
||||
<GIC_SPI 309 0>,
|
||||
<GIC_SPI 314 0>,
|
||||
<GIC_SPI 315 0>;
|
||||
interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "csiphy0",
|
||||
"csiphy1",
|
||||
"csiphy2",
|
||||
|
|
|
|||
|
|
@ -73,18 +73,8 @@
|
|||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0x0 0xc0 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc1 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc2 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc3 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc4 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc5 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc6 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc7 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc8 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xc9 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xca 0x0 IRQ_TYPE_NONE>,
|
||||
<0x0 0xcb 0x0 IRQ_TYPE_NONE>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -62,18 +62,8 @@
|
|||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0x2 0xc0 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc1 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc2 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc3 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc4 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc5 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc6 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc7 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc8 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xc9 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xca 0x0 IRQ_TYPE_NONE>,
|
||||
<0x2 0xcb 0x0 IRQ_TYPE_NONE>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -56,18 +56,8 @@
|
|||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0x4 0xc0 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc1 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc2 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc3 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc4 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc5 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc6 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc7 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc8 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xc9 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xca 0x0 IRQ_TYPE_NONE>,
|
||||
<0x4 0xcb 0x0 IRQ_TYPE_NONE>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -730,6 +730,27 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
int step = is_default_overflow_handler(wp);
|
||||
struct arch_hw_breakpoint *info = counter_arch_bp(wp);
|
||||
|
||||
info->trigger = addr;
|
||||
|
||||
/*
|
||||
* If we triggered a user watchpoint from a uaccess routine, then
|
||||
* handle the stepping ourselves since userspace really can't help
|
||||
* us with this.
|
||||
*/
|
||||
if (!user_mode(regs) && info->ctrl.privilege == AARCH64_BREAKPOINT_EL0)
|
||||
step = 1;
|
||||
else
|
||||
perf_bp_event(wp, regs);
|
||||
|
||||
return step;
|
||||
}
|
||||
|
||||
static int watchpoint_handler(unsigned long addr, unsigned int esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
|
|
@ -739,7 +760,6 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr,
|
|||
u64 val;
|
||||
struct perf_event *wp, **slots;
|
||||
struct debug_info *debug_info;
|
||||
struct arch_hw_breakpoint *info;
|
||||
struct arch_hw_breakpoint_ctrl ctrl;
|
||||
|
||||
slots = this_cpu_ptr(wp_on_reg);
|
||||
|
|
@ -777,25 +797,13 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr,
|
|||
if (dist != 0)
|
||||
continue;
|
||||
|
||||
info = counter_arch_bp(wp);
|
||||
info->trigger = addr;
|
||||
perf_bp_event(wp, regs);
|
||||
|
||||
/* Do we need to handle the stepping? */
|
||||
if (is_default_overflow_handler(wp))
|
||||
step = 1;
|
||||
step = watchpoint_report(wp, addr, regs);
|
||||
}
|
||||
if (min_dist > 0 && min_dist != -1) {
|
||||
/* No exact match found. */
|
||||
wp = slots[closest_match];
|
||||
info = counter_arch_bp(wp);
|
||||
info->trigger = addr;
|
||||
perf_bp_event(wp, regs);
|
||||
|
||||
/* Do we need to handle the stepping? */
|
||||
if (is_default_overflow_handler(wp))
|
||||
step = 1;
|
||||
}
|
||||
/* No exact match found? */
|
||||
if (min_dist > 0 && min_dist != -1)
|
||||
step = watchpoint_report(slots[closest_match], addr, regs);
|
||||
|
||||
rcu_read_unlock();
|
||||
|
||||
if (!step)
|
||||
|
|
|
|||
|
|
@ -216,8 +216,10 @@ static int __init mcf_pci_init(void)
|
|||
|
||||
/* Keep a virtual mapping to IO/config space active */
|
||||
iospace = (unsigned long) ioremap(PCI_IO_PA, PCI_IO_SIZE);
|
||||
if (iospace == 0)
|
||||
if (iospace == 0) {
|
||||
pci_free_host_bridge(bridge);
|
||||
return -ENODEV;
|
||||
}
|
||||
pr_info("Coldfire: PCI IO/config window mapped to 0x%x\n",
|
||||
(u32) iospace);
|
||||
|
||||
|
|
|
|||
|
|
@ -1166,13 +1166,13 @@ ENTRY(__sys_clone)
|
|||
l.movhi r29,hi(sys_clone)
|
||||
l.ori r29,r29,lo(sys_clone)
|
||||
l.j _fork_save_extra_regs_and_call
|
||||
l.addi r7,r1,0
|
||||
l.nop
|
||||
|
||||
ENTRY(__sys_fork)
|
||||
l.movhi r29,hi(sys_fork)
|
||||
l.ori r29,r29,lo(sys_fork)
|
||||
l.j _fork_save_extra_regs_and_call
|
||||
l.addi r3,r1,0
|
||||
l.nop
|
||||
|
||||
ENTRY(sys_rt_sigreturn)
|
||||
l.jal _sys_rt_sigreturn
|
||||
|
|
|
|||
|
|
@ -747,6 +747,7 @@ config THREAD_SHIFT
|
|||
range 13 15
|
||||
default "15" if PPC_256K_PAGES
|
||||
default "14" if PPC64
|
||||
default "14" if KASAN
|
||||
default "13"
|
||||
help
|
||||
Used to define the stack size. The default is almost always what you
|
||||
|
|
|
|||
|
|
@ -998,10 +998,25 @@ extern struct page *pgd_page(pgd_t pgd);
|
|||
#define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
|
||||
#define pgd_page_vaddr(pgd) __va(pgd_val(pgd) & ~PGD_MASKED_BITS)
|
||||
|
||||
#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
|
||||
#define pud_index(address) (((address) >> (PUD_SHIFT)) & (PTRS_PER_PUD - 1))
|
||||
#define pmd_index(address) (((address) >> (PMD_SHIFT)) & (PTRS_PER_PMD - 1))
|
||||
#define pte_index(address) (((address) >> (PAGE_SHIFT)) & (PTRS_PER_PTE - 1))
|
||||
static inline unsigned long pgd_index(unsigned long address)
|
||||
{
|
||||
return (address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1);
|
||||
}
|
||||
|
||||
static inline unsigned long pud_index(unsigned long address)
|
||||
{
|
||||
return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
|
||||
}
|
||||
|
||||
static inline unsigned long pmd_index(unsigned long address)
|
||||
{
|
||||
return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
|
||||
}
|
||||
|
||||
static inline unsigned long pte_index(unsigned long address)
|
||||
{
|
||||
return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
|
||||
}
|
||||
|
||||
/*
|
||||
* Find an entry in a page-table-directory. We combine the address region
|
||||
|
|
|
|||
|
|
@ -291,7 +291,6 @@ struct thread_struct {
|
|||
#else
|
||||
#define INIT_THREAD { \
|
||||
.ksp = INIT_SP, \
|
||||
.regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
|
||||
.addr_limit = KERNEL_DS, \
|
||||
.fpexc_mode = 0, \
|
||||
.fscr = FSCR_TAR | FSCR_EBB \
|
||||
|
|
|
|||
|
|
@ -1090,17 +1090,19 @@ EXC_COMMON_BEGIN(machine_check_idle_common)
|
|||
bl machine_check_queue_event
|
||||
|
||||
/*
|
||||
* We have not used any non-volatile GPRs here, and as a rule
|
||||
* most exception code including machine check does not.
|
||||
* Therefore PACA_NAPSTATELOST does not need to be set. Idle
|
||||
* wakeup will restore volatile registers.
|
||||
* GPR-loss wakeups are relatively straightforward, because the
|
||||
* idle sleep code has saved all non-volatile registers on its
|
||||
* own stack, and r1 in PACAR1.
|
||||
*
|
||||
* Load the original SRR1 into r3 for pnv_powersave_wakeup_mce.
|
||||
* For no-loss wakeups the r1 and lr registers used by the
|
||||
* early machine check handler have to be restored first. r2 is
|
||||
* the kernel TOC, so no need to restore it.
|
||||
*
|
||||
* Then decrement MCE nesting after finishing with the stack.
|
||||
*/
|
||||
ld r3,_MSR(r1)
|
||||
ld r4,_LINK(r1)
|
||||
ld r1,GPR1(r1)
|
||||
|
||||
lhz r11,PACA_IN_MCE(r13)
|
||||
subi r11,r11,1
|
||||
|
|
@ -1109,7 +1111,7 @@ EXC_COMMON_BEGIN(machine_check_idle_common)
|
|||
mtlr r4
|
||||
rlwinm r10,r3,47-31,30,31
|
||||
cmpwi cr1,r10,2
|
||||
bltlr cr1 /* no state loss, return to idle caller */
|
||||
bltlr cr1 /* no state loss, return to idle caller with r3=SRR1 */
|
||||
b idle_return_gpr_loss
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -945,15 +945,8 @@ start_here_multiplatform:
|
|||
std r0,0(r4)
|
||||
#endif
|
||||
|
||||
/* The following gets the stack set up with the regs */
|
||||
/* pointing to the real addr of the kernel stack. This is */
|
||||
/* all done to support the C function call below which sets */
|
||||
/* up the htab. This is done because we have relocated the */
|
||||
/* kernel but are still running in real mode. */
|
||||
|
||||
LOAD_REG_ADDR(r3,init_thread_union)
|
||||
|
||||
/* set up a stack pointer */
|
||||
LOAD_REG_ADDR(r3,init_thread_union)
|
||||
LOAD_REG_IMMEDIATE(r1,THREAD_SIZE)
|
||||
add r1,r3,r1
|
||||
li r0,0
|
||||
|
|
|
|||
|
|
@ -114,11 +114,12 @@ void machine_kexec(struct kimage *image)
|
|||
|
||||
void __init reserve_crashkernel(void)
|
||||
{
|
||||
unsigned long long crash_size, crash_base;
|
||||
unsigned long long crash_size, crash_base, total_mem_sz;
|
||||
int ret;
|
||||
|
||||
total_mem_sz = memory_limit ? memory_limit : memblock_phys_mem_size();
|
||||
/* use common parsing */
|
||||
ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
|
||||
ret = parse_crashkernel(boot_command_line, total_mem_sz,
|
||||
&crash_size, &crash_base);
|
||||
if (ret == 0 && crash_size > 0) {
|
||||
crashk_res.start = crash_base;
|
||||
|
|
@ -177,6 +178,7 @@ void __init reserve_crashkernel(void)
|
|||
/* Crash kernel trumps memory limit */
|
||||
if (memory_limit && memory_limit <= crashk_res.end) {
|
||||
memory_limit = crashk_res.end + 1;
|
||||
total_mem_sz = memory_limit;
|
||||
printk("Adjusted memory limit for crashkernel, now 0x%llx\n",
|
||||
memory_limit);
|
||||
}
|
||||
|
|
@ -185,7 +187,7 @@ void __init reserve_crashkernel(void)
|
|||
"for crashkernel (System RAM: %ldMB)\n",
|
||||
(unsigned long)(crash_size >> 20),
|
||||
(unsigned long)(crashk_res.start >> 20),
|
||||
(unsigned long)(memblock_phys_mem_size() >> 20));
|
||||
(unsigned long)(total_mem_sz >> 20));
|
||||
|
||||
if (!memblock_is_region_memory(crashk_res.start, crash_size) ||
|
||||
memblock_reserve(crashk_res.start, crash_size)) {
|
||||
|
|
|
|||
|
|
@ -1218,29 +1218,31 @@ struct task_struct *__switch_to(struct task_struct *prev,
|
|||
static void show_instructions(struct pt_regs *regs)
|
||||
{
|
||||
int i;
|
||||
unsigned long nip = regs->nip;
|
||||
unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int));
|
||||
|
||||
printk("Instruction dump:");
|
||||
|
||||
/*
|
||||
* If we were executing with the MMU off for instructions, adjust pc
|
||||
* rather than printing XXXXXXXX.
|
||||
*/
|
||||
if (!IS_ENABLED(CONFIG_BOOKE) && !(regs->msr & MSR_IR)) {
|
||||
pc = (unsigned long)phys_to_virt(pc);
|
||||
nip = (unsigned long)phys_to_virt(regs->nip);
|
||||
}
|
||||
|
||||
for (i = 0; i < NR_INSN_TO_PRINT; i++) {
|
||||
int instr;
|
||||
|
||||
if (!(i % 8))
|
||||
pr_cont("\n");
|
||||
|
||||
#if !defined(CONFIG_BOOKE)
|
||||
/* If executing with the IMMU off, adjust pc rather
|
||||
* than print XXXXXXXX.
|
||||
*/
|
||||
if (!(regs->msr & MSR_IR))
|
||||
pc = (unsigned long)phys_to_virt(pc);
|
||||
#endif
|
||||
|
||||
if (!__kernel_text_address(pc) ||
|
||||
probe_kernel_address((const void *)pc, instr)) {
|
||||
pr_cont("XXXXXXXX ");
|
||||
} else {
|
||||
if (regs->nip == pc)
|
||||
if (nip == pc)
|
||||
pr_cont("<%08x> ", instr);
|
||||
else
|
||||
pr_cont("%08x ", instr);
|
||||
|
|
|
|||
|
|
@ -353,7 +353,13 @@ static struct kmem_cache *kvm_pmd_cache;
|
|||
|
||||
static pte_t *kvmppc_pte_alloc(void)
|
||||
{
|
||||
return kmem_cache_alloc(kvm_pte_cache, GFP_KERNEL);
|
||||
pte_t *pte;
|
||||
|
||||
pte = kmem_cache_alloc(kvm_pte_cache, GFP_KERNEL);
|
||||
/* pmd_populate() will only reference _pa(pte). */
|
||||
kmemleak_ignore(pte);
|
||||
|
||||
return pte;
|
||||
}
|
||||
|
||||
static void kvmppc_pte_free(pte_t *ptep)
|
||||
|
|
@ -363,7 +369,13 @@ static void kvmppc_pte_free(pte_t *ptep)
|
|||
|
||||
static pmd_t *kvmppc_pmd_alloc(void)
|
||||
{
|
||||
return kmem_cache_alloc(kvm_pmd_cache, GFP_KERNEL);
|
||||
pmd_t *pmd;
|
||||
|
||||
pmd = kmem_cache_alloc(kvm_pmd_cache, GFP_KERNEL);
|
||||
/* pud_populate() will only reference _pa(pmd). */
|
||||
kmemleak_ignore(pmd);
|
||||
|
||||
return pmd;
|
||||
}
|
||||
|
||||
static void kvmppc_pmd_free(pmd_t *pmdp)
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@ extern void kvm_spapr_tce_release_iommu_group(struct kvm *kvm,
|
|||
struct kvmppc_spapr_tce_iommu_table *stit, *tmp;
|
||||
struct iommu_table_group *table_group = NULL;
|
||||
|
||||
rcu_read_lock();
|
||||
list_for_each_entry_rcu(stt, &kvm->arch.spapr_tce_tables, list) {
|
||||
|
||||
table_group = iommu_group_get_iommudata(grp);
|
||||
|
|
@ -88,7 +89,9 @@ extern void kvm_spapr_tce_release_iommu_group(struct kvm *kvm,
|
|||
kref_put(&stit->kref, kvm_spapr_tce_liobn_put);
|
||||
}
|
||||
}
|
||||
cond_resched_rcu();
|
||||
}
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
extern long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,
|
||||
|
|
@ -106,12 +109,14 @@ extern long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,
|
|||
if (!f.file)
|
||||
return -EBADF;
|
||||
|
||||
rcu_read_lock();
|
||||
list_for_each_entry_rcu(stt, &kvm->arch.spapr_tce_tables, list) {
|
||||
if (stt == f.file->private_data) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
rcu_read_unlock();
|
||||
|
||||
fdput(f);
|
||||
|
||||
|
|
@ -144,6 +149,7 @@ extern long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,
|
|||
if (!tbl)
|
||||
return -EINVAL;
|
||||
|
||||
rcu_read_lock();
|
||||
list_for_each_entry_rcu(stit, &stt->iommu_tables, next) {
|
||||
if (tbl != stit->tbl)
|
||||
continue;
|
||||
|
|
@ -151,14 +157,17 @@ extern long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,
|
|||
if (!kref_get_unless_zero(&stit->kref)) {
|
||||
/* stit is being destroyed */
|
||||
iommu_tce_table_put(tbl);
|
||||
rcu_read_unlock();
|
||||
return -ENOTTY;
|
||||
}
|
||||
/*
|
||||
* The table is already known to this KVM, we just increased
|
||||
* its KVM reference counter and can return.
|
||||
*/
|
||||
rcu_read_unlock();
|
||||
return 0;
|
||||
}
|
||||
rcu_read_unlock();
|
||||
|
||||
stit = kzalloc(sizeof(*stit), GFP_KERNEL);
|
||||
if (!stit) {
|
||||
|
|
@ -364,18 +373,19 @@ static long kvmppc_tce_validate(struct kvmppc_spapr_tce_table *stt,
|
|||
if (kvmppc_tce_to_ua(stt->kvm, tce, &ua))
|
||||
return H_TOO_HARD;
|
||||
|
||||
rcu_read_lock();
|
||||
list_for_each_entry_rcu(stit, &stt->iommu_tables, next) {
|
||||
unsigned long hpa = 0;
|
||||
struct mm_iommu_table_group_mem_t *mem;
|
||||
long shift = stit->tbl->it_page_shift;
|
||||
|
||||
mem = mm_iommu_lookup(stt->kvm->mm, ua, 1ULL << shift);
|
||||
if (!mem)
|
||||
return H_TOO_HARD;
|
||||
|
||||
if (mm_iommu_ua_to_hpa(mem, ua, shift, &hpa))
|
||||
if (!mem || mm_iommu_ua_to_hpa(mem, ua, shift, &hpa)) {
|
||||
rcu_read_unlock();
|
||||
return H_TOO_HARD;
|
||||
}
|
||||
}
|
||||
rcu_read_unlock();
|
||||
|
||||
return H_SUCCESS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -187,6 +187,7 @@ void mmu_mark_initmem_nx(void)
|
|||
int i;
|
||||
unsigned long base = (unsigned long)_stext - PAGE_OFFSET;
|
||||
unsigned long top = (unsigned long)_etext - PAGE_OFFSET;
|
||||
unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;
|
||||
unsigned long size;
|
||||
|
||||
if (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
|
||||
|
|
@ -201,9 +202,10 @@ void mmu_mark_initmem_nx(void)
|
|||
size = block_size(base, top);
|
||||
size = max(size, 128UL << 10);
|
||||
if ((top - base) > size) {
|
||||
if (strict_kernel_rwx_enabled())
|
||||
pr_warn("Kernel _etext not properly aligned\n");
|
||||
size <<= 1;
|
||||
if (strict_kernel_rwx_enabled() && base + size > border)
|
||||
pr_warn("Some RW data is getting mapped X. "
|
||||
"Adjust CONFIG_DATA_SHIFT to avoid that.\n");
|
||||
}
|
||||
setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);
|
||||
base += size;
|
||||
|
|
|
|||
|
|
@ -30,6 +30,11 @@ static const struct flag_info flag_array[] = {
|
|||
.val = _PAGE_PRESENT,
|
||||
.set = "present",
|
||||
.clear = " ",
|
||||
}, {
|
||||
.mask = _PAGE_COHERENT,
|
||||
.val = _PAGE_COHERENT,
|
||||
.set = "coherent",
|
||||
.clear = " ",
|
||||
}, {
|
||||
.mask = _PAGE_GUARDED,
|
||||
.val = _PAGE_GUARDED,
|
||||
|
|
|
|||
|
|
@ -1400,16 +1400,6 @@ static void h_24x7_event_read(struct perf_event *event)
|
|||
h24x7hw = &get_cpu_var(hv_24x7_hw);
|
||||
h24x7hw->events[i] = event;
|
||||
put_cpu_var(h24x7hw);
|
||||
/*
|
||||
* Clear the event count so we can compute the _change_
|
||||
* in the 24x7 raw counter value at the end of the txn.
|
||||
*
|
||||
* Note that we could alternatively read the 24x7 value
|
||||
* now and save its value in event->hw.prev_count. But
|
||||
* that would require issuing a hcall, which would then
|
||||
* defeat the purpose of using the txn interface.
|
||||
*/
|
||||
local64_set(&event->count, 0);
|
||||
}
|
||||
|
||||
put_cpu_var(hv_24x7_reqb);
|
||||
|
|
|
|||
|
|
@ -1242,7 +1242,7 @@ static void __init ppc460sx_pciex_check_link(struct ppc4xx_pciex_port *port)
|
|||
if (mbase == NULL) {
|
||||
printk(KERN_ERR "%pOF: Can't map internal config space !",
|
||||
port->node);
|
||||
goto done;
|
||||
return;
|
||||
}
|
||||
|
||||
while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA)
|
||||
|
|
@ -1252,9 +1252,7 @@ static void __init ppc460sx_pciex_check_link(struct ppc4xx_pciex_port *port)
|
|||
}
|
||||
if (attempt)
|
||||
port->link = 1;
|
||||
done:
|
||||
iounmap(mbase);
|
||||
|
||||
}
|
||||
|
||||
static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = {
|
||||
|
|
|
|||
|
|
@ -200,13 +200,14 @@ void ps3_mm_vas_destroy(void)
|
|||
{
|
||||
int result;
|
||||
|
||||
DBG("%s:%d: map.vas_id = %llu\n", __func__, __LINE__, map.vas_id);
|
||||
|
||||
if (map.vas_id) {
|
||||
result = lv1_select_virtual_address_space(0);
|
||||
BUG_ON(result);
|
||||
result = lv1_destruct_virtual_address_space(map.vas_id);
|
||||
BUG_ON(result);
|
||||
result += lv1_destruct_virtual_address_space(map.vas_id);
|
||||
|
||||
if (result) {
|
||||
lv1_panic(0);
|
||||
}
|
||||
|
||||
map.vas_id = 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -304,19 +305,20 @@ static void ps3_mm_region_destroy(struct mem_region *r)
|
|||
int result;
|
||||
|
||||
if (!r->destroy) {
|
||||
pr_info("%s:%d: Not destroying high region: %llxh %llxh\n",
|
||||
__func__, __LINE__, r->base, r->size);
|
||||
return;
|
||||
}
|
||||
|
||||
DBG("%s:%d: r->base = %llxh\n", __func__, __LINE__, r->base);
|
||||
|
||||
if (r->base) {
|
||||
result = lv1_release_memory(r->base);
|
||||
BUG_ON(result);
|
||||
|
||||
if (result) {
|
||||
lv1_panic(0);
|
||||
}
|
||||
|
||||
r->size = r->base = r->offset = 0;
|
||||
map.total = map.rm.size;
|
||||
}
|
||||
|
||||
ps3_mm_set_repository_highmem(NULL);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -395,10 +395,11 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
|
|||
/*
|
||||
* Some versions of FWNMI place the buffer inside the 4kB page starting at
|
||||
* 0x7000. Other versions place it inside the rtas buffer. We check both.
|
||||
* Minimum size of the buffer is 16 bytes.
|
||||
*/
|
||||
#define VALID_FWNMI_BUFFER(A) \
|
||||
((((A) >= 0x7000) && ((A) < 0x7ff0)) || \
|
||||
(((A) >= rtas.base) && ((A) < (rtas.base + rtas.size - 16))))
|
||||
((((A) >= 0x7000) && ((A) <= 0x8000 - 16)) || \
|
||||
(((A) >= rtas.base) && ((A) <= (rtas.base + rtas.size - 16))))
|
||||
|
||||
static inline struct rtas_error_log *fwnmi_get_errlog(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -33,7 +33,17 @@ static inline void syscall_rollback(struct task_struct *task,
|
|||
static inline long syscall_get_error(struct task_struct *task,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
return IS_ERR_VALUE(regs->gprs[2]) ? regs->gprs[2] : 0;
|
||||
unsigned long error = regs->gprs[2];
|
||||
#ifdef CONFIG_COMPAT
|
||||
if (test_tsk_thread_flag(task, TIF_31BIT)) {
|
||||
/*
|
||||
* Sign-extend the value so (int)-EFOO becomes (long)-EFOO
|
||||
* and will match correctly in comparisons.
|
||||
*/
|
||||
error = (long)(int)error;
|
||||
}
|
||||
#endif
|
||||
return IS_ERR_VALUE(error) ? error : 0;
|
||||
}
|
||||
|
||||
static inline long syscall_get_return_value(struct task_struct *task,
|
||||
|
|
|
|||
|
|
@ -379,7 +379,6 @@ pgtable_t pte_alloc_one(struct mm_struct *mm)
|
|||
return NULL;
|
||||
page = pfn_to_page(__nocache_pa(pte) >> PAGE_SHIFT);
|
||||
if (!pgtable_pte_page_ctor(page)) {
|
||||
__free_page(page);
|
||||
return NULL;
|
||||
}
|
||||
return page;
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
|
|||
|
||||
SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
|
||||
|
||||
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|_ehead\|_text\|z_.*\)$$/\#define ZO_\2 0x\1/p'
|
||||
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [a-zA-Z] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|_ehead\|_text\|z_.*\)$$/\#define ZO_\2 0x\1/p'
|
||||
|
||||
quiet_cmd_zoffset = ZOFFSET $@
|
||||
cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@
|
||||
|
|
|
|||
|
|
@ -2099,7 +2099,7 @@ void __init init_apic_mappings(void)
|
|||
unsigned int new_apicid;
|
||||
|
||||
if (apic_validate_deadline_timer())
|
||||
pr_debug("TSC deadline timer available\n");
|
||||
pr_info("TSC deadline timer available\n");
|
||||
|
||||
if (x2apic_mode) {
|
||||
boot_cpu_physical_apicid = read_apic_id();
|
||||
|
|
|
|||
|
|
@ -318,7 +318,11 @@ void __init idt_setup_apic_and_irq_gates(void)
|
|||
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
for_each_clear_bit_from(i, system_vectors, NR_VECTORS) {
|
||||
set_bit(i, system_vectors);
|
||||
/*
|
||||
* Don't set the non assigned system vectors in the
|
||||
* system_vectors bitmap. Otherwise they show up in
|
||||
* /proc/interrupts.
|
||||
*/
|
||||
entry = spurious_entries_start + 8 * (i - FIRST_SYSTEM_VECTOR);
|
||||
set_intr_gate(i, entry);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -746,16 +746,11 @@ asm(
|
|||
NOKPROBE_SYMBOL(kretprobe_trampoline);
|
||||
STACK_FRAME_NON_STANDARD(kretprobe_trampoline);
|
||||
|
||||
static struct kprobe kretprobe_kprobe = {
|
||||
.addr = (void *)kretprobe_trampoline,
|
||||
};
|
||||
|
||||
/*
|
||||
* Called from kretprobe_trampoline
|
||||
*/
|
||||
__used __visible void *trampoline_handler(struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe_ctlblk *kcb;
|
||||
struct kretprobe_instance *ri = NULL;
|
||||
struct hlist_head *head, empty_rp;
|
||||
struct hlist_node *tmp;
|
||||
|
|
@ -765,16 +760,12 @@ __used __visible void *trampoline_handler(struct pt_regs *regs)
|
|||
void *frame_pointer;
|
||||
bool skipped = false;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
/*
|
||||
* Set a dummy kprobe for avoiding kretprobe recursion.
|
||||
* Since kretprobe never run in kprobe handler, kprobe must not
|
||||
* be running at this point.
|
||||
*/
|
||||
kcb = get_kprobe_ctlblk();
|
||||
__this_cpu_write(current_kprobe, &kretprobe_kprobe);
|
||||
kcb->kprobe_status = KPROBE_HIT_ACTIVE;
|
||||
kprobe_busy_begin();
|
||||
|
||||
INIT_HLIST_HEAD(&empty_rp);
|
||||
kretprobe_hash_lock(current, &head, &flags);
|
||||
|
|
@ -850,7 +841,7 @@ __used __visible void *trampoline_handler(struct pt_regs *regs)
|
|||
__this_cpu_write(current_kprobe, &ri->rp->kp);
|
||||
ri->ret_addr = correct_ret_addr;
|
||||
ri->rp->handler(ri, regs);
|
||||
__this_cpu_write(current_kprobe, &kretprobe_kprobe);
|
||||
__this_cpu_write(current_kprobe, &kprobe_busy);
|
||||
}
|
||||
|
||||
recycle_rp_inst(ri, &empty_rp);
|
||||
|
|
@ -866,8 +857,7 @@ __used __visible void *trampoline_handler(struct pt_regs *regs)
|
|||
|
||||
kretprobe_hash_unlock(current, &flags);
|
||||
|
||||
__this_cpu_write(current_kprobe, NULL);
|
||||
preempt_enable();
|
||||
kprobe_busy_end();
|
||||
|
||||
hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
|
||||
hlist_del(&ri->hlist);
|
||||
|
|
|
|||
|
|
@ -17,7 +17,10 @@ CFLAGS_sha256.o := -D__DISABLE_EXPORTS
|
|||
LDFLAGS_purgatory.ro := -e purgatory_start -r --no-undefined -nostdlib -z nodefaultlib
|
||||
targets += purgatory.ro
|
||||
|
||||
# Sanitizer, etc. runtimes are unavailable and cannot be linked here.
|
||||
GCOV_PROFILE := n
|
||||
KASAN_SANITIZE := n
|
||||
UBSAN_SANITIZE := n
|
||||
KCOV_INSTRUMENT := n
|
||||
|
||||
# These are adjustments to the compiler flags used for objects that
|
||||
|
|
@ -25,7 +28,7 @@ KCOV_INSTRUMENT := n
|
|||
|
||||
PURGATORY_CFLAGS_REMOVE := -mcmodel=kernel
|
||||
PURGATORY_CFLAGS := -mcmodel=large -ffreestanding -fno-zero-initialized-in-bss
|
||||
PURGATORY_CFLAGS += $(DISABLE_STACKLEAK_PLUGIN)
|
||||
PURGATORY_CFLAGS += $(DISABLE_STACKLEAK_PLUGIN) -DDISABLE_BRANCH_PROFILING
|
||||
|
||||
# Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That
|
||||
# in turn leaves some undefined symbols like __fentry__ in purgatory and not
|
||||
|
|
|
|||
|
|
@ -188,8 +188,6 @@ static int cryptomgr_schedule_probe(struct crypto_larval *larval)
|
|||
if (IS_ERR(thread))
|
||||
goto err_put_larval;
|
||||
|
||||
wait_for_completion_interruptible(&larval->completion);
|
||||
|
||||
return NOTIFY_STOP;
|
||||
|
||||
err_put_larval:
|
||||
|
|
|
|||
|
|
@ -74,14 +74,10 @@ static int _skcipher_recvmsg(struct socket *sock, struct msghdr *msg,
|
|||
return PTR_ERR(areq);
|
||||
|
||||
/* convert iovecs of output buffers into RX SGL */
|
||||
err = af_alg_get_rsgl(sk, msg, flags, areq, -1, &len);
|
||||
err = af_alg_get_rsgl(sk, msg, flags, areq, ctx->used, &len);
|
||||
if (err)
|
||||
goto free;
|
||||
|
||||
/* Process only as much RX buffers for which we have TX data */
|
||||
if (len > ctx->used)
|
||||
len = ctx->used;
|
||||
|
||||
/*
|
||||
* If more buffers are to be expected to be processed, process only
|
||||
* full block size buffers.
|
||||
|
|
|
|||
|
|
@ -41,7 +41,6 @@
|
|||
#include <linux/workqueue.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/async.h>
|
||||
#include <linux/log2.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/glob.h>
|
||||
|
|
@ -6592,7 +6591,7 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
|
|||
/* perform each probe asynchronously */
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
struct ata_port *ap = host->ports[i];
|
||||
async_schedule(async_port_probe, ap);
|
||||
ap->cookie = async_schedule(async_port_probe, ap);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -6732,11 +6731,11 @@ void ata_host_detach(struct ata_host *host)
|
|||
{
|
||||
int i;
|
||||
|
||||
/* Ensure ata_port probe has completed */
|
||||
async_synchronize_full();
|
||||
|
||||
for (i = 0; i < host->n_ports; i++)
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
/* Ensure ata_port probe has completed */
|
||||
async_synchronize_cookie(host->ports[i]->cookie + 1);
|
||||
ata_port_detach(host->ports[i]);
|
||||
}
|
||||
|
||||
/* the host is dead now, dissociate ACPI */
|
||||
ata_acpi_dissociate(host);
|
||||
|
|
|
|||
|
|
@ -802,6 +802,8 @@ int __init_or_module __platform_driver_probe(struct platform_driver *drv,
|
|||
/* temporary section violation during probe() */
|
||||
drv->probe = probe;
|
||||
retval = code = __platform_driver_register(drv, module);
|
||||
if (retval)
|
||||
return retval;
|
||||
|
||||
/*
|
||||
* Fixup that section violation, being paranoid about code scanning
|
||||
|
|
|
|||
|
|
@ -454,7 +454,6 @@ static int ps3disk_probe(struct ps3_system_bus_device *_dev)
|
|||
queue->queuedata = dev;
|
||||
|
||||
blk_queue_max_hw_sectors(queue, dev->bounce_size >> 9);
|
||||
blk_queue_segment_boundary(queue, -1UL);
|
||||
blk_queue_dma_alignment(queue, dev->blk_size-1);
|
||||
blk_queue_logical_block_size(queue, dev->blk_size);
|
||||
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@
|
|||
#include <linux/workqueue.h>
|
||||
#include <linux/uuid.h>
|
||||
#include <linux/nospec.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
#define IPMI_DRIVER_VERSION "39.2"
|
||||
|
||||
|
|
@ -1170,7 +1171,7 @@ static void free_user_work(struct work_struct *work)
|
|||
remove_work);
|
||||
|
||||
cleanup_srcu_struct(&user->release_barrier);
|
||||
kfree(user);
|
||||
vfree(user);
|
||||
}
|
||||
|
||||
int ipmi_create_user(unsigned int if_num,
|
||||
|
|
@ -1202,7 +1203,7 @@ int ipmi_create_user(unsigned int if_num,
|
|||
if (rv)
|
||||
return rv;
|
||||
|
||||
new_user = kmalloc(sizeof(*new_user), GFP_KERNEL);
|
||||
new_user = vzalloc(sizeof(*new_user));
|
||||
if (!new_user)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -1249,7 +1250,7 @@ int ipmi_create_user(unsigned int if_num,
|
|||
|
||||
out_kfree:
|
||||
srcu_read_unlock(&ipmi_interfaces_srcu, index);
|
||||
kfree(new_user);
|
||||
vfree(new_user);
|
||||
return rv;
|
||||
}
|
||||
EXPORT_SYMBOL(ipmi_create_user);
|
||||
|
|
|
|||
|
|
@ -31,11 +31,15 @@
|
|||
#include <linux/uio.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/security.h>
|
||||
#include <linux/pseudo_fs.h>
|
||||
#include <uapi/linux/magic.h>
|
||||
#include <linux/mount.h>
|
||||
|
||||
#ifdef CONFIG_IA64
|
||||
# include <linux/efi.h>
|
||||
#endif
|
||||
|
||||
#define DEVMEM_MINOR 1
|
||||
#define DEVPORT_MINOR 4
|
||||
|
||||
static inline unsigned long size_inside_page(unsigned long start,
|
||||
|
|
@ -805,12 +809,64 @@ static loff_t memory_lseek(struct file *file, loff_t offset, int orig)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static struct inode *devmem_inode;
|
||||
|
||||
#ifdef CONFIG_IO_STRICT_DEVMEM
|
||||
void revoke_devmem(struct resource *res)
|
||||
{
|
||||
struct inode *inode = READ_ONCE(devmem_inode);
|
||||
|
||||
/*
|
||||
* Check that the initialization has completed. Losing the race
|
||||
* is ok because it means drivers are claiming resources before
|
||||
* the fs_initcall level of init and prevent /dev/mem from
|
||||
* establishing mappings.
|
||||
*/
|
||||
if (!inode)
|
||||
return;
|
||||
|
||||
/*
|
||||
* The expectation is that the driver has successfully marked
|
||||
* the resource busy by this point, so devmem_is_allowed()
|
||||
* should start returning false, however for performance this
|
||||
* does not iterate the entire resource range.
|
||||
*/
|
||||
if (devmem_is_allowed(PHYS_PFN(res->start)) &&
|
||||
devmem_is_allowed(PHYS_PFN(res->end))) {
|
||||
/*
|
||||
* *cringe* iomem=relaxed says "go ahead, what's the
|
||||
* worst that can happen?"
|
||||
*/
|
||||
return;
|
||||
}
|
||||
|
||||
unmap_mapping_range(inode->i_mapping, res->start, resource_size(res), 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int open_port(struct inode *inode, struct file *filp)
|
||||
{
|
||||
int rc;
|
||||
|
||||
if (!capable(CAP_SYS_RAWIO))
|
||||
return -EPERM;
|
||||
|
||||
return security_locked_down(LOCKDOWN_DEV_MEM);
|
||||
rc = security_locked_down(LOCKDOWN_DEV_MEM);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
if (iminor(inode) != DEVMEM_MINOR)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Use a unified address space to have a single point to manage
|
||||
* revocations when drivers want to take over a /dev/mem mapped
|
||||
* range.
|
||||
*/
|
||||
inode->i_mapping = devmem_inode->i_mapping;
|
||||
filp->f_mapping = inode->i_mapping;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define zero_lseek null_lseek
|
||||
|
|
@ -885,7 +941,7 @@ static const struct memdev {
|
|||
fmode_t fmode;
|
||||
} devlist[] = {
|
||||
#ifdef CONFIG_DEVMEM
|
||||
[1] = { "mem", 0, &mem_fops, FMODE_UNSIGNED_OFFSET },
|
||||
[DEVMEM_MINOR] = { "mem", 0, &mem_fops, FMODE_UNSIGNED_OFFSET },
|
||||
#endif
|
||||
#ifdef CONFIG_DEVKMEM
|
||||
[2] = { "kmem", 0, &kmem_fops, FMODE_UNSIGNED_OFFSET },
|
||||
|
|
@ -939,6 +995,45 @@ static char *mem_devnode(struct device *dev, umode_t *mode)
|
|||
|
||||
static struct class *mem_class;
|
||||
|
||||
static int devmem_fs_init_fs_context(struct fs_context *fc)
|
||||
{
|
||||
return init_pseudo(fc, DEVMEM_MAGIC) ? 0 : -ENOMEM;
|
||||
}
|
||||
|
||||
static struct file_system_type devmem_fs_type = {
|
||||
.name = "devmem",
|
||||
.owner = THIS_MODULE,
|
||||
.init_fs_context = devmem_fs_init_fs_context,
|
||||
.kill_sb = kill_anon_super,
|
||||
};
|
||||
|
||||
static int devmem_init_inode(void)
|
||||
{
|
||||
static struct vfsmount *devmem_vfs_mount;
|
||||
static int devmem_fs_cnt;
|
||||
struct inode *inode;
|
||||
int rc;
|
||||
|
||||
rc = simple_pin_fs(&devmem_fs_type, &devmem_vfs_mount, &devmem_fs_cnt);
|
||||
if (rc < 0) {
|
||||
pr_err("Cannot mount /dev/mem pseudo filesystem: %d\n", rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
inode = alloc_anon_inode(devmem_vfs_mount->mnt_sb);
|
||||
if (IS_ERR(inode)) {
|
||||
rc = PTR_ERR(inode);
|
||||
pr_err("Cannot allocate inode for /dev/mem: %d\n", rc);
|
||||
simple_release_fs(&devmem_vfs_mount, &devmem_fs_cnt);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* publish /dev/mem initialized */
|
||||
WRITE_ONCE(devmem_inode, inode);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init chr_dev_init(void)
|
||||
{
|
||||
int minor;
|
||||
|
|
@ -960,6 +1055,8 @@ static int __init chr_dev_init(void)
|
|||
*/
|
||||
if ((minor == DEVPORT_MINOR) && !arch_has_dev_port())
|
||||
continue;
|
||||
if ((minor == DEVMEM_MINOR) && devmem_init_inode() != 0)
|
||||
continue;
|
||||
|
||||
device_create(mem_class, NULL, MKDEV(MEM_MAJOR, minor),
|
||||
NULL, devlist[minor].name);
|
||||
|
|
|
|||
|
|
@ -1448,13 +1448,13 @@ static struct clk_hw *bcm2835_register_clock(struct bcm2835_cprman *cprman,
|
|||
return &clock->hw;
|
||||
}
|
||||
|
||||
static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
|
||||
static struct clk_hw *bcm2835_register_gate(struct bcm2835_cprman *cprman,
|
||||
const struct bcm2835_gate_data *data)
|
||||
{
|
||||
return clk_register_gate(cprman->dev, data->name, data->parent,
|
||||
CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
|
||||
cprman->regs + data->ctl_reg,
|
||||
CM_GATE_BIT, 0, &cprman->regs_lock);
|
||||
return clk_hw_register_gate(cprman->dev, data->name, data->parent,
|
||||
CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
|
||||
cprman->regs + data->ctl_reg,
|
||||
CM_GATE_BIT, 0, &cprman->regs_lock);
|
||||
}
|
||||
|
||||
typedef struct clk_hw *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
|
||||
|
|
|
|||
|
|
@ -599,14 +599,22 @@ static const u32 ast2600_a0_axi_ahb_div_table[] = {
|
|||
2, 2, 3, 5,
|
||||
};
|
||||
|
||||
static const u32 ast2600_a1_axi_ahb_div_table[] = {
|
||||
4, 6, 2, 4,
|
||||
static const u32 ast2600_a1_axi_ahb_div0_tbl[] = {
|
||||
3, 2, 3, 4,
|
||||
};
|
||||
|
||||
static const u32 ast2600_a1_axi_ahb_div1_tbl[] = {
|
||||
3, 4, 6, 8,
|
||||
};
|
||||
|
||||
static const u32 ast2600_a1_axi_ahb200_tbl[] = {
|
||||
3, 4, 3, 4, 2, 2, 2, 2,
|
||||
};
|
||||
|
||||
static void __init aspeed_g6_cc(struct regmap *map)
|
||||
{
|
||||
struct clk_hw *hw;
|
||||
u32 val, div, chip_id, axi_div, ahb_div;
|
||||
u32 val, div, divbits, chip_id, axi_div, ahb_div;
|
||||
|
||||
clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, 25000000);
|
||||
|
||||
|
|
@ -636,11 +644,22 @@ static void __init aspeed_g6_cc(struct regmap *map)
|
|||
else
|
||||
axi_div = 2;
|
||||
|
||||
divbits = (val >> 11) & 0x3;
|
||||
regmap_read(map, ASPEED_G6_SILICON_REV, &chip_id);
|
||||
if (chip_id & BIT(16))
|
||||
ahb_div = ast2600_a1_axi_ahb_div_table[(val >> 11) & 0x3];
|
||||
else
|
||||
if (chip_id & BIT(16)) {
|
||||
if (!divbits) {
|
||||
ahb_div = ast2600_a1_axi_ahb200_tbl[(val >> 8) & 0x3];
|
||||
if (val & BIT(16))
|
||||
ahb_div *= 2;
|
||||
} else {
|
||||
if (val & BIT(16))
|
||||
ahb_div = ast2600_a1_axi_ahb_div1_tbl[divbits];
|
||||
else
|
||||
ahb_div = ast2600_a1_axi_ahb_div0_tbl[divbits];
|
||||
}
|
||||
} else {
|
||||
ahb_div = ast2600_a0_axi_ahb_div_table[(val >> 11) & 0x3];
|
||||
}
|
||||
|
||||
hw = clk_hw_register_fixed_factor(NULL, "ahb", "hpll", 0, 1, axi_div * ahb_div);
|
||||
aspeed_g6_clk_data->hws[ASPEED_CLK_AHB] = hw;
|
||||
|
|
|
|||
|
|
@ -1071,7 +1071,7 @@ static struct clk_regmap meson8b_vid_pll_in_sel = {
|
|||
* Meson8m2: vid2_pll
|
||||
*/
|
||||
.parent_hws = (const struct clk_hw *[]) {
|
||||
&meson8b_hdmi_pll_dco.hw
|
||||
&meson8b_hdmi_pll_lvds_out.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
|
|
@ -1207,7 +1207,7 @@ static struct clk_regmap meson8b_vclk_in_en = {
|
|||
|
||||
static struct clk_regmap meson8b_vclk_div1_gate = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_DIV,
|
||||
.offset = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 0,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
|
|
@ -1237,7 +1237,7 @@ static struct clk_fixed_factor meson8b_vclk_div2_div = {
|
|||
|
||||
static struct clk_regmap meson8b_vclk_div2_div_gate = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_DIV,
|
||||
.offset = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 1,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
|
|
@ -1267,7 +1267,7 @@ static struct clk_fixed_factor meson8b_vclk_div4_div = {
|
|||
|
||||
static struct clk_regmap meson8b_vclk_div4_div_gate = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_DIV,
|
||||
.offset = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 2,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
|
|
@ -1297,7 +1297,7 @@ static struct clk_fixed_factor meson8b_vclk_div6_div = {
|
|||
|
||||
static struct clk_regmap meson8b_vclk_div6_div_gate = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_DIV,
|
||||
.offset = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 3,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
|
|
@ -1327,7 +1327,7 @@ static struct clk_fixed_factor meson8b_vclk_div12_div = {
|
|||
|
||||
static struct clk_regmap meson8b_vclk_div12_div_gate = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_DIV,
|
||||
.offset = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 4,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
|
|
@ -1910,6 +1910,13 @@ static struct clk_regmap meson8b_mali = {
|
|||
},
|
||||
};
|
||||
|
||||
static const struct reg_sequence meson8m2_gp_pll_init_regs[] = {
|
||||
{ .reg = HHI_GP_PLL_CNTL2, .def = 0x59c88000 },
|
||||
{ .reg = HHI_GP_PLL_CNTL3, .def = 0xca463823 },
|
||||
{ .reg = HHI_GP_PLL_CNTL4, .def = 0x0286a027 },
|
||||
{ .reg = HHI_GP_PLL_CNTL5, .def = 0x00003000 },
|
||||
};
|
||||
|
||||
static const struct pll_params_table meson8m2_gp_pll_params_table[] = {
|
||||
PLL_PARAMS(182, 3),
|
||||
{ /* sentinel */ },
|
||||
|
|
@ -1943,6 +1950,8 @@ static struct clk_regmap meson8m2_gp_pll_dco = {
|
|||
.width = 1,
|
||||
},
|
||||
.table = meson8m2_gp_pll_params_table,
|
||||
.init_regs = meson8m2_gp_pll_init_regs,
|
||||
.init_count = ARRAY_SIZE(meson8m2_gp_pll_init_regs),
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "gp_pll_dco",
|
||||
|
|
@ -3491,54 +3500,87 @@ static struct clk_regmap *const meson8b_clk_regmaps[] = {
|
|||
static const struct meson8b_clk_reset_line {
|
||||
u32 reg;
|
||||
u8 bit_idx;
|
||||
bool active_low;
|
||||
} meson8b_clk_reset_bits[] = {
|
||||
[CLKC_RESET_L2_CACHE_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 30
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 30,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 29
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 29,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_SCU_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 28
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 28,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_CPU3_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 27
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 27,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_CPU2_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 26
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 26,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_CPU1_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 25
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 25,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_CPU0_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 24
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 24,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_A5_GLOBAL_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 18
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 18,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_A5_AXI_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 17
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 17,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_A5_ABP_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 16
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.bit_idx = 16,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SOFT_RESET] = {
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL1, .bit_idx = 30
|
||||
.reg = HHI_SYS_CPU_CLK_CNTL1,
|
||||
.bit_idx = 30,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_VID_CLK_CNTL_SOFT_RESET] = {
|
||||
.reg = HHI_VID_CLK_CNTL, .bit_idx = 15
|
||||
.reg = HHI_VID_CLK_CNTL,
|
||||
.bit_idx = 15,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_POST] = {
|
||||
.reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 7
|
||||
.reg = HHI_VID_DIVIDER_CNTL,
|
||||
.bit_idx = 7,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_PRE] = {
|
||||
.reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 3
|
||||
.reg = HHI_VID_DIVIDER_CNTL,
|
||||
.bit_idx = 3,
|
||||
.active_low = false,
|
||||
},
|
||||
[CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_POST] = {
|
||||
.reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 1
|
||||
.reg = HHI_VID_DIVIDER_CNTL,
|
||||
.bit_idx = 1,
|
||||
.active_low = true,
|
||||
},
|
||||
[CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PRE] = {
|
||||
.reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 0
|
||||
.reg = HHI_VID_DIVIDER_CNTL,
|
||||
.bit_idx = 0,
|
||||
.active_low = true,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -3547,22 +3589,22 @@ static int meson8b_clk_reset_update(struct reset_controller_dev *rcdev,
|
|||
{
|
||||
struct meson8b_clk_reset *meson8b_clk_reset =
|
||||
container_of(rcdev, struct meson8b_clk_reset, reset);
|
||||
unsigned long flags;
|
||||
const struct meson8b_clk_reset_line *reset;
|
||||
unsigned int value = 0;
|
||||
unsigned long flags;
|
||||
|
||||
if (id >= ARRAY_SIZE(meson8b_clk_reset_bits))
|
||||
return -EINVAL;
|
||||
|
||||
reset = &meson8b_clk_reset_bits[id];
|
||||
|
||||
if (assert != reset->active_low)
|
||||
value = BIT(reset->bit_idx);
|
||||
|
||||
spin_lock_irqsave(&meson_clk_lock, flags);
|
||||
|
||||
if (assert)
|
||||
regmap_update_bits(meson8b_clk_reset->regmap, reset->reg,
|
||||
BIT(reset->bit_idx), BIT(reset->bit_idx));
|
||||
else
|
||||
regmap_update_bits(meson8b_clk_reset->regmap, reset->reg,
|
||||
BIT(reset->bit_idx), 0);
|
||||
regmap_update_bits(meson8b_clk_reset->regmap, reset->reg,
|
||||
BIT(reset->bit_idx), value);
|
||||
|
||||
spin_unlock_irqrestore(&meson_clk_lock, flags);
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,10 @@
|
|||
* [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf
|
||||
*/
|
||||
#define HHI_GP_PLL_CNTL 0x40 /* 0x10 offset in data sheet */
|
||||
#define HHI_GP_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */
|
||||
#define HHI_GP_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */
|
||||
#define HHI_GP_PLL_CNTL4 0x4C /* 0x13 offset in data sheet */
|
||||
#define HHI_GP_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */
|
||||
#define HHI_VIID_CLK_DIV 0x128 /* 0x4a offset in data sheet */
|
||||
#define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */
|
||||
#define HHI_GCLK_MPEG0 0x140 /* 0x50 offset in data sheet */
|
||||
|
|
|
|||
|
|
@ -260,7 +260,7 @@ static struct clk_pll gpll0 = {
|
|||
.l_reg = 0x21004,
|
||||
.m_reg = 0x21008,
|
||||
.n_reg = 0x2100c,
|
||||
.config_reg = 0x21014,
|
||||
.config_reg = 0x21010,
|
||||
.mode_reg = 0x21000,
|
||||
.status_reg = 0x2101c,
|
||||
.status_bit = 17,
|
||||
|
|
@ -287,7 +287,7 @@ static struct clk_pll gpll1 = {
|
|||
.l_reg = 0x20004,
|
||||
.m_reg = 0x20008,
|
||||
.n_reg = 0x2000c,
|
||||
.config_reg = 0x20014,
|
||||
.config_reg = 0x20010,
|
||||
.mode_reg = 0x20000,
|
||||
.status_reg = 0x2001c,
|
||||
.status_bit = 17,
|
||||
|
|
@ -314,7 +314,7 @@ static struct clk_pll gpll2 = {
|
|||
.l_reg = 0x4a004,
|
||||
.m_reg = 0x4a008,
|
||||
.n_reg = 0x4a00c,
|
||||
.config_reg = 0x4a014,
|
||||
.config_reg = 0x4a010,
|
||||
.mode_reg = 0x4a000,
|
||||
.status_reg = 0x4a01c,
|
||||
.status_bit = 17,
|
||||
|
|
@ -341,7 +341,7 @@ static struct clk_pll bimc_pll = {
|
|||
.l_reg = 0x23004,
|
||||
.m_reg = 0x23008,
|
||||
.n_reg = 0x2300c,
|
||||
.config_reg = 0x23014,
|
||||
.config_reg = 0x23010,
|
||||
.mode_reg = 0x23000,
|
||||
.status_reg = 0x2301c,
|
||||
.status_bit = 17,
|
||||
|
|
|
|||
|
|
@ -800,7 +800,8 @@ static int cpg_mssr_suspend_noirq(struct device *dev)
|
|||
/* Save module registers with bits under our control */
|
||||
for (reg = 0; reg < ARRAY_SIZE(priv->smstpcr_saved); reg++) {
|
||||
if (priv->smstpcr_saved[reg].mask)
|
||||
priv->smstpcr_saved[reg].val =
|
||||
priv->smstpcr_saved[reg].val = priv->stbyctrl ?
|
||||
readb(priv->base + STBCR(reg)) :
|
||||
readl(priv->base + SMSTPCR(reg));
|
||||
}
|
||||
|
||||
|
|
@ -860,8 +861,9 @@ static int cpg_mssr_resume_noirq(struct device *dev)
|
|||
}
|
||||
|
||||
if (!i)
|
||||
dev_warn(dev, "Failed to enable SMSTP %p[0x%x]\n",
|
||||
priv->base + SMSTPCR(reg), oldval & mask);
|
||||
dev_warn(dev, "Failed to enable %s%u[0x%x]\n",
|
||||
priv->stbyctrl ? "STB" : "SMSTP", reg,
|
||||
oldval & mask);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -540,7 +540,7 @@ static const struct samsung_div_clock exynos5800_div_clks[] __initconst = {
|
|||
|
||||
static const struct samsung_gate_clock exynos5800_gate_clks[] __initconst = {
|
||||
GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam",
|
||||
GATE_BUS_TOP, 24, 0, 0),
|
||||
GATE_BUS_TOP, 24, CLK_IS_CRITICAL, 0),
|
||||
GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler",
|
||||
GATE_BUS_TOP, 27, CLK_IS_CRITICAL, 0),
|
||||
};
|
||||
|
|
@ -940,25 +940,25 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = {
|
|||
GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg",
|
||||
GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0),
|
||||
GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0",
|
||||
GATE_BUS_TOP, 5, 0, 0),
|
||||
GATE_BUS_TOP, 5, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl",
|
||||
GATE_BUS_TOP, 6, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl",
|
||||
GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0),
|
||||
GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp",
|
||||
GATE_BUS_TOP, 8, 0, 0),
|
||||
GATE_BUS_TOP, 8, CLK_IS_CRITICAL, 0),
|
||||
GATE(CLK_PCLK66_GPIO, "pclk66_gpio", "mout_user_pclk66_gpio",
|
||||
GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0),
|
||||
GATE(0, "aclk66_psgen", "mout_user_aclk66_psgen",
|
||||
GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0),
|
||||
GATE(0, "aclk266_isp", "mout_user_aclk266_isp",
|
||||
GATE_BUS_TOP, 13, 0, 0),
|
||||
GATE_BUS_TOP, 13, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk166", "mout_user_aclk166",
|
||||
GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0),
|
||||
GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333",
|
||||
GATE_BUS_TOP, 15, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk400_isp", "mout_user_aclk400_isp",
|
||||
GATE_BUS_TOP, 16, 0, 0),
|
||||
GATE_BUS_TOP, 16, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl",
|
||||
GATE_BUS_TOP, 17, CLK_IS_CRITICAL, 0),
|
||||
GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1",
|
||||
|
|
@ -1158,8 +1158,10 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = {
|
|||
GATE_IP_GSCL1, 3, 0, 0),
|
||||
GATE(CLK_SMMU_FIMCL1, "smmu_fimcl1", "dout_gscl_blk_333",
|
||||
GATE_IP_GSCL1, 4, 0, 0),
|
||||
GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12, 0, 0),
|
||||
GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13, 0, 0),
|
||||
GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12,
|
||||
CLK_IS_CRITICAL, 0),
|
||||
GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13,
|
||||
CLK_IS_CRITICAL, 0),
|
||||
GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "dout_gscl_blk_333",
|
||||
GATE_IP_GSCL1, 16, 0, 0),
|
||||
GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl",
|
||||
|
|
|
|||
|
|
@ -1706,7 +1706,8 @@ static const struct samsung_gate_clock peric_gate_clks[] __initconst = {
|
|||
GATE(CLK_SCLK_PCM1, "sclk_pcm1", "sclk_pcm1_peric",
|
||||
ENABLE_SCLK_PERIC, 7, CLK_SET_RATE_PARENT, 0),
|
||||
GATE(CLK_SCLK_I2S1, "sclk_i2s1", "sclk_i2s1_peric",
|
||||
ENABLE_SCLK_PERIC, 6, CLK_SET_RATE_PARENT, 0),
|
||||
ENABLE_SCLK_PERIC, 6,
|
||||
CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
|
||||
GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC,
|
||||
5, CLK_SET_RATE_PARENT, 0),
|
||||
GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ static unsigned long _sprd_pll_recalc_rate(const struct sprd_pll *pll,
|
|||
|
||||
cfg = kcalloc(regs_num, sizeof(*cfg), GFP_KERNEL);
|
||||
if (!cfg)
|
||||
return -ENOMEM;
|
||||
return parent_rate;
|
||||
|
||||
for (i = 0; i < regs_num; i++)
|
||||
cfg[i] = sprd_pll_read(pll, i);
|
||||
|
|
|
|||
|
|
@ -375,6 +375,7 @@ static void __init st_of_flexgen_setup(struct device_node *np)
|
|||
break;
|
||||
}
|
||||
|
||||
flex_flags &= ~CLK_IS_CRITICAL;
|
||||
of_clk_detect_critical(np, i, &flex_flags);
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ static void sun6i_a31_get_pll1_factors(struct factors_request *req)
|
|||
* Round down the frequency to the closest multiple of either
|
||||
* 6 or 16
|
||||
*/
|
||||
u32 round_freq_6 = round_down(freq_mhz, 6);
|
||||
u32 round_freq_6 = rounddown(freq_mhz, 6);
|
||||
u32 round_freq_16 = round_down(freq_mhz, 16);
|
||||
|
||||
if (round_freq_6 > round_freq_16)
|
||||
|
|
|
|||
|
|
@ -196,6 +196,7 @@ cleanup:
|
|||
if (!cclk->comp_clks[i])
|
||||
continue;
|
||||
list_del(&cclk->comp_clks[i]->link);
|
||||
kfree(cclk->comp_clks[i]->parent_names);
|
||||
kfree(cclk->comp_clks[i]);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -558,7 +558,7 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name,
|
|||
{
|
||||
int j;
|
||||
u32 num_nodes, clk_dev_id;
|
||||
char *clk_out = NULL;
|
||||
char *clk_out[MAX_NODES];
|
||||
struct clock_topology *nodes;
|
||||
struct clk_hw *hw = NULL;
|
||||
|
||||
|
|
@ -572,16 +572,16 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name,
|
|||
* Intermediate clock names are postfixed with type of clock.
|
||||
*/
|
||||
if (j != (num_nodes - 1)) {
|
||||
clk_out = kasprintf(GFP_KERNEL, "%s%s", clk_name,
|
||||
clk_out[j] = kasprintf(GFP_KERNEL, "%s%s", clk_name,
|
||||
clk_type_postfix[nodes[j].type]);
|
||||
} else {
|
||||
clk_out = kasprintf(GFP_KERNEL, "%s", clk_name);
|
||||
clk_out[j] = kasprintf(GFP_KERNEL, "%s", clk_name);
|
||||
}
|
||||
|
||||
if (!clk_topology[nodes[j].type])
|
||||
continue;
|
||||
|
||||
hw = (*clk_topology[nodes[j].type])(clk_out, clk_dev_id,
|
||||
hw = (*clk_topology[nodes[j].type])(clk_out[j], clk_dev_id,
|
||||
parent_names,
|
||||
num_parents,
|
||||
&nodes[j]);
|
||||
|
|
@ -590,9 +590,12 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name,
|
|||
__func__, clk_dev_id, clk_name,
|
||||
PTR_ERR(hw));
|
||||
|
||||
parent_names[0] = clk_out;
|
||||
parent_names[0] = clk_out[j];
|
||||
}
|
||||
kfree(clk_out);
|
||||
|
||||
for (j = 0; j < num_nodes; j++)
|
||||
kfree(clk_out[j]);
|
||||
|
||||
return hw;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -165,8 +165,6 @@ struct omap_sham_hmac_ctx {
|
|||
};
|
||||
|
||||
struct omap_sham_ctx {
|
||||
struct omap_sham_dev *dd;
|
||||
|
||||
unsigned long flags;
|
||||
|
||||
/* fallback stuff */
|
||||
|
|
@ -918,27 +916,35 @@ static int omap_sham_update_dma_stop(struct omap_sham_dev *dd)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct omap_sham_dev *omap_sham_find_dev(struct omap_sham_reqctx *ctx)
|
||||
{
|
||||
struct omap_sham_dev *dd;
|
||||
|
||||
if (ctx->dd)
|
||||
return ctx->dd;
|
||||
|
||||
spin_lock_bh(&sham.lock);
|
||||
dd = list_first_entry(&sham.dev_list, struct omap_sham_dev, list);
|
||||
list_move_tail(&dd->list, &sham.dev_list);
|
||||
ctx->dd = dd;
|
||||
spin_unlock_bh(&sham.lock);
|
||||
|
||||
return dd;
|
||||
}
|
||||
|
||||
static int omap_sham_init(struct ahash_request *req)
|
||||
{
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct omap_sham_ctx *tctx = crypto_ahash_ctx(tfm);
|
||||
struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
|
||||
struct omap_sham_dev *dd = NULL, *tmp;
|
||||
struct omap_sham_dev *dd;
|
||||
int bs = 0;
|
||||
|
||||
spin_lock_bh(&sham.lock);
|
||||
if (!tctx->dd) {
|
||||
list_for_each_entry(tmp, &sham.dev_list, list) {
|
||||
dd = tmp;
|
||||
break;
|
||||
}
|
||||
tctx->dd = dd;
|
||||
} else {
|
||||
dd = tctx->dd;
|
||||
}
|
||||
spin_unlock_bh(&sham.lock);
|
||||
ctx->dd = NULL;
|
||||
|
||||
ctx->dd = dd;
|
||||
dd = omap_sham_find_dev(ctx);
|
||||
if (!dd)
|
||||
return -ENODEV;
|
||||
|
||||
ctx->flags = 0;
|
||||
|
||||
|
|
@ -1187,8 +1193,7 @@ err1:
|
|||
static int omap_sham_enqueue(struct ahash_request *req, unsigned int op)
|
||||
{
|
||||
struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
|
||||
struct omap_sham_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
|
||||
struct omap_sham_dev *dd = tctx->dd;
|
||||
struct omap_sham_dev *dd = ctx->dd;
|
||||
|
||||
ctx->op = op;
|
||||
|
||||
|
|
@ -1198,7 +1203,7 @@ static int omap_sham_enqueue(struct ahash_request *req, unsigned int op)
|
|||
static int omap_sham_update(struct ahash_request *req)
|
||||
{
|
||||
struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
|
||||
struct omap_sham_dev *dd = ctx->dd;
|
||||
struct omap_sham_dev *dd = omap_sham_find_dev(ctx);
|
||||
|
||||
if (!req->nbytes)
|
||||
return 0;
|
||||
|
|
@ -1302,21 +1307,8 @@ static int omap_sham_setkey(struct crypto_ahash *tfm, const u8 *key,
|
|||
struct omap_sham_hmac_ctx *bctx = tctx->base;
|
||||
int bs = crypto_shash_blocksize(bctx->shash);
|
||||
int ds = crypto_shash_digestsize(bctx->shash);
|
||||
struct omap_sham_dev *dd = NULL, *tmp;
|
||||
int err, i;
|
||||
|
||||
spin_lock_bh(&sham.lock);
|
||||
if (!tctx->dd) {
|
||||
list_for_each_entry(tmp, &sham.dev_list, list) {
|
||||
dd = tmp;
|
||||
break;
|
||||
}
|
||||
tctx->dd = dd;
|
||||
} else {
|
||||
dd = tctx->dd;
|
||||
}
|
||||
spin_unlock_bh(&sham.lock);
|
||||
|
||||
err = crypto_shash_setkey(tctx->fallback, key, keylen);
|
||||
if (err)
|
||||
return err;
|
||||
|
|
@ -1334,7 +1326,7 @@ static int omap_sham_setkey(struct crypto_ahash *tfm, const u8 *key,
|
|||
|
||||
memset(bctx->ipad + keylen, 0, bs - keylen);
|
||||
|
||||
if (!test_bit(FLAGS_AUTO_XOR, &dd->flags)) {
|
||||
if (!test_bit(FLAGS_AUTO_XOR, &sham.flags)) {
|
||||
memcpy(bctx->opad, bctx->ipad, bs);
|
||||
|
||||
for (i = 0; i < bs; i++) {
|
||||
|
|
@ -2136,6 +2128,7 @@ static int omap_sham_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
dd->flags |= dd->pdata->flags;
|
||||
sham.flags |= dd->pdata->flags;
|
||||
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY);
|
||||
|
|
@ -2163,6 +2156,9 @@ static int omap_sham_probe(struct platform_device *pdev)
|
|||
spin_unlock(&sham.lock);
|
||||
|
||||
for (i = 0; i < dd->pdata->algs_info_size; i++) {
|
||||
if (dd->pdata->algs_info[i].registered)
|
||||
break;
|
||||
|
||||
for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
|
||||
struct ahash_alg *alg;
|
||||
|
||||
|
|
@ -2214,9 +2210,11 @@ static int omap_sham_remove(struct platform_device *pdev)
|
|||
list_del(&dd->list);
|
||||
spin_unlock(&sham.lock);
|
||||
for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
|
||||
for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
|
||||
for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) {
|
||||
crypto_unregister_ahash(
|
||||
&dd->pdata->algs_info[i].algs_list[j]);
|
||||
dd->pdata->algs_info[i].registered--;
|
||||
}
|
||||
tasklet_kill(&dd->done_task);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ static int adc_jack_probe(struct platform_device *pdev)
|
|||
for (i = 0; data->adc_conditions[i].id != EXTCON_NONE; i++);
|
||||
data->num_conditions = i;
|
||||
|
||||
data->chan = iio_channel_get(&pdev->dev, pdata->consumer_channel);
|
||||
data->chan = devm_iio_channel_get(&pdev->dev, pdata->consumer_channel);
|
||||
if (IS_ERR(data->chan))
|
||||
return PTR_ERR(data->chan);
|
||||
|
||||
|
|
@ -164,7 +164,6 @@ static int adc_jack_remove(struct platform_device *pdev)
|
|||
|
||||
free_irq(data->irq, data);
|
||||
cancel_work_sync(&data->handler.work);
|
||||
iio_channel_release(data->chan);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -300,6 +300,7 @@ static int imx_scu_probe(struct platform_device *pdev)
|
|||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to request mbox chan %s ret %d\n",
|
||||
chan_name, ret);
|
||||
kfree(chan_name);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/cpumask.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/dma-direct.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
|
|
@ -447,8 +446,7 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
|
|||
struct qcom_scm_mem_map_info *mem_to_map;
|
||||
phys_addr_t mem_to_map_phys;
|
||||
phys_addr_t dest_phys;
|
||||
phys_addr_t ptr_phys;
|
||||
dma_addr_t ptr_dma;
|
||||
dma_addr_t ptr_phys;
|
||||
size_t mem_to_map_sz;
|
||||
size_t dest_sz;
|
||||
size_t src_sz;
|
||||
|
|
@ -465,10 +463,9 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
|
|||
ptr_sz = ALIGN(src_sz, SZ_64) + ALIGN(mem_to_map_sz, SZ_64) +
|
||||
ALIGN(dest_sz, SZ_64);
|
||||
|
||||
ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_dma, GFP_KERNEL);
|
||||
ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_phys, GFP_KERNEL);
|
||||
if (!ptr)
|
||||
return -ENOMEM;
|
||||
ptr_phys = dma_to_phys(__scm->dev, ptr_dma);
|
||||
|
||||
/* Fill source vmid detail */
|
||||
src = ptr;
|
||||
|
|
@ -496,7 +493,7 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
|
|||
|
||||
ret = __qcom_scm_assign_mem(__scm->dev, mem_to_map_phys, mem_to_map_sz,
|
||||
ptr_phys, src_sz, dest_phys, dest_sz);
|
||||
dma_free_coherent(__scm->dev, ptr_sz, ptr, ptr_dma);
|
||||
dma_free_coherent(__scm->dev, ptr_sz, ptr, ptr_phys);
|
||||
if (ret) {
|
||||
dev_err(__scm->dev,
|
||||
"Assign memory protection call failed %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -61,10 +61,10 @@ static int afu_dma_pin_pages(struct dfl_feature_platform_data *pdata,
|
|||
region->pages);
|
||||
if (pinned < 0) {
|
||||
ret = pinned;
|
||||
goto put_pages;
|
||||
goto free_pages;
|
||||
} else if (pinned != npages) {
|
||||
ret = -EFAULT;
|
||||
goto free_pages;
|
||||
goto put_pages;
|
||||
}
|
||||
|
||||
dev_dbg(dev, "%d pages pinned\n", pinned);
|
||||
|
|
|
|||
|
|
@ -49,7 +49,9 @@
|
|||
#define GPIO_EXT_PORTC 0x58
|
||||
#define GPIO_EXT_PORTD 0x5c
|
||||
|
||||
#define DWAPB_DRIVER_NAME "gpio-dwapb"
|
||||
#define DWAPB_MAX_PORTS 4
|
||||
|
||||
#define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */
|
||||
#define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */
|
||||
#define GPIO_SWPORT_DDR_STRIDE 0x0c /* register stride 3*32 bits */
|
||||
|
|
@ -398,7 +400,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
|
|||
return;
|
||||
|
||||
err = irq_alloc_domain_generic_chips(gpio->domain, ngpio, 2,
|
||||
"gpio-dwapb", handle_level_irq,
|
||||
DWAPB_DRIVER_NAME, handle_level_irq,
|
||||
IRQ_NOREQUEST, 0,
|
||||
IRQ_GC_INIT_NESTED_LOCK);
|
||||
if (err) {
|
||||
|
|
@ -455,7 +457,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
|
|||
*/
|
||||
err = devm_request_irq(gpio->dev, pp->irq[0],
|
||||
dwapb_irq_handler_mfd,
|
||||
IRQF_SHARED, "gpio-dwapb-mfd", gpio);
|
||||
IRQF_SHARED, DWAPB_DRIVER_NAME, gpio);
|
||||
if (err) {
|
||||
dev_err(gpio->dev, "error requesting IRQ\n");
|
||||
irq_domain_remove(gpio->domain);
|
||||
|
|
@ -533,26 +535,33 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
|
|||
dwapb_configure_irqs(gpio, port, pp);
|
||||
|
||||
err = gpiochip_add_data(&port->gc, port);
|
||||
if (err)
|
||||
if (err) {
|
||||
dev_err(gpio->dev, "failed to register gpiochip for port%d\n",
|
||||
port->idx);
|
||||
else
|
||||
port->is_registered = true;
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Add GPIO-signaled ACPI event support */
|
||||
if (pp->has_irq)
|
||||
acpi_gpiochip_request_interrupts(&port->gc);
|
||||
acpi_gpiochip_request_interrupts(&port->gc);
|
||||
|
||||
return err;
|
||||
port->is_registered = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
|
||||
{
|
||||
unsigned int m;
|
||||
|
||||
for (m = 0; m < gpio->nr_ports; ++m)
|
||||
if (gpio->ports[m].is_registered)
|
||||
gpiochip_remove(&gpio->ports[m].gc);
|
||||
for (m = 0; m < gpio->nr_ports; ++m) {
|
||||
struct dwapb_gpio_port *port = &gpio->ports[m];
|
||||
|
||||
if (!port->is_registered)
|
||||
continue;
|
||||
|
||||
acpi_gpiochip_free_interrupts(&port->gc);
|
||||
gpiochip_remove(&port->gc);
|
||||
}
|
||||
}
|
||||
|
||||
static struct dwapb_platform_data *
|
||||
|
|
@ -836,7 +845,7 @@ static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend,
|
|||
|
||||
static struct platform_driver dwapb_gpio_driver = {
|
||||
.driver = {
|
||||
.name = "gpio-dwapb",
|
||||
.name = DWAPB_DRIVER_NAME,
|
||||
.pm = &dwapb_gpio_pm_ops,
|
||||
.of_match_table = of_match_ptr(dwapb_of_match),
|
||||
.acpi_match_table = ACPI_PTR(dwapb_acpi_match),
|
||||
|
|
@ -850,3 +859,4 @@ module_platform_driver(dwapb_gpio_driver);
|
|||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Jamie Iles");
|
||||
MODULE_DESCRIPTION("Synopsys DesignWare APB GPIO driver");
|
||||
MODULE_ALIAS("platform:" DWAPB_DRIVER_NAME);
|
||||
|
|
|
|||
|
|
@ -306,8 +306,22 @@ static const struct regmap_config pca953x_i2c_regmap = {
|
|||
.volatile_reg = pca953x_volatile_register,
|
||||
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
/* REVISIT: should be 0x7f but some 24 bit chips use REG_ADDR_AI */
|
||||
.max_register = 0xff,
|
||||
.max_register = 0x7f,
|
||||
};
|
||||
|
||||
static const struct regmap_config pca953x_ai_i2c_regmap = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
|
||||
.read_flag_mask = REG_ADDR_AI,
|
||||
.write_flag_mask = REG_ADDR_AI,
|
||||
|
||||
.readable_reg = pca953x_readable_register,
|
||||
.writeable_reg = pca953x_writeable_register,
|
||||
.volatile_reg = pca953x_volatile_register,
|
||||
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.max_register = 0x7f,
|
||||
};
|
||||
|
||||
static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
|
||||
|
|
@ -318,18 +332,6 @@ static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
|
|||
int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
|
||||
u8 regaddr = pinctrl | addr | (off / BANK_SZ);
|
||||
|
||||
/* Single byte read doesn't need AI bit set. */
|
||||
if (!addrinc)
|
||||
return regaddr;
|
||||
|
||||
/* Chips with 24 and more GPIOs always support Auto Increment */
|
||||
if (write && NBANK(chip) > 2)
|
||||
regaddr |= REG_ADDR_AI;
|
||||
|
||||
/* PCA9575 needs address-increment on multi-byte writes */
|
||||
if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
|
||||
regaddr |= REG_ADDR_AI;
|
||||
|
||||
return regaddr;
|
||||
}
|
||||
|
||||
|
|
@ -897,6 +899,7 @@ static int pca953x_probe(struct i2c_client *client,
|
|||
int ret;
|
||||
u32 invert = 0;
|
||||
struct regulator *reg;
|
||||
const struct regmap_config *regmap_config;
|
||||
|
||||
chip = devm_kzalloc(&client->dev,
|
||||
sizeof(struct pca953x_chip), GFP_KERNEL);
|
||||
|
|
@ -960,7 +963,17 @@ static int pca953x_probe(struct i2c_client *client,
|
|||
|
||||
i2c_set_clientdata(client, chip);
|
||||
|
||||
chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
|
||||
pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
|
||||
|
||||
if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
|
||||
dev_info(&client->dev, "using AI\n");
|
||||
regmap_config = &pca953x_ai_i2c_regmap;
|
||||
} else {
|
||||
dev_info(&client->dev, "using no AI\n");
|
||||
regmap_config = &pca953x_i2c_regmap;
|
||||
}
|
||||
|
||||
chip->regmap = devm_regmap_init_i2c(client, regmap_config);
|
||||
if (IS_ERR(chip->regmap)) {
|
||||
ret = PTR_ERR(chip->regmap);
|
||||
goto err_exit;
|
||||
|
|
@ -991,7 +1004,6 @@ static int pca953x_probe(struct i2c_client *client,
|
|||
/* initialize cached registers from their original values.
|
||||
* we can't share this chip with another i2c master.
|
||||
*/
|
||||
pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
|
||||
|
||||
if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
|
||||
chip->regs = &pca953x_regs;
|
||||
|
|
|
|||
|
|
@ -929,7 +929,7 @@ static int dm_late_init(void *handle)
|
|||
unsigned int linear_lut[16];
|
||||
int i;
|
||||
struct dmcu *dmcu = adev->dm.dc->res_pool->dmcu;
|
||||
bool ret = false;
|
||||
bool ret;
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
linear_lut[i] = 0xFFFF * i / 15;
|
||||
|
|
@ -945,13 +945,10 @@ static int dm_late_init(void *handle)
|
|||
*/
|
||||
params.min_abm_backlight = 0x28F;
|
||||
|
||||
/* todo will enable for navi10 */
|
||||
if (adev->asic_type <= CHIP_RAVEN) {
|
||||
ret = dmcu_load_iram(dmcu, params);
|
||||
ret = dmcu_load_iram(dmcu, params);
|
||||
|
||||
if (!ret)
|
||||
return -EINVAL;
|
||||
}
|
||||
if (!ret)
|
||||
return -EINVAL;
|
||||
|
||||
return detect_mst_link_for_all_connectors(adev->ddev);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2543,7 +2543,6 @@ static enum bp_result construct_integrated_info(
|
|||
|
||||
/* Sort voltage table from low to high*/
|
||||
if (result == BP_RESULT_OK) {
|
||||
struct clock_voltage_caps temp = {0, 0};
|
||||
uint32_t i;
|
||||
uint32_t j;
|
||||
|
||||
|
|
@ -2553,10 +2552,8 @@ static enum bp_result construct_integrated_info(
|
|||
info->disp_clk_voltage[j].max_supported_clk <
|
||||
info->disp_clk_voltage[j-1].max_supported_clk) {
|
||||
/* swap j and j - 1*/
|
||||
temp = info->disp_clk_voltage[j-1];
|
||||
info->disp_clk_voltage[j-1] =
|
||||
info->disp_clk_voltage[j];
|
||||
info->disp_clk_voltage[j] = temp;
|
||||
swap(info->disp_clk_voltage[j - 1],
|
||||
info->disp_clk_voltage[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1613,8 +1613,6 @@ static enum bp_result construct_integrated_info(
|
|||
|
||||
struct atom_common_table_header *header;
|
||||
struct atom_data_revision revision;
|
||||
|
||||
struct clock_voltage_caps temp = {0, 0};
|
||||
uint32_t i;
|
||||
uint32_t j;
|
||||
|
||||
|
|
@ -1644,10 +1642,8 @@ static enum bp_result construct_integrated_info(
|
|||
info->disp_clk_voltage[j-1].max_supported_clk
|
||||
) {
|
||||
/* swap j and j - 1*/
|
||||
temp = info->disp_clk_voltage[j-1];
|
||||
info->disp_clk_voltage[j-1] =
|
||||
info->disp_clk_voltage[j];
|
||||
info->disp_clk_voltage[j] = temp;
|
||||
swap(info->disp_clk_voltage[j - 1],
|
||||
info->disp_clk_voltage[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -907,15 +907,11 @@ static void program_timing_sync(
|
|||
|
||||
/* set first pipe with plane as master */
|
||||
for (j = 0; j < group_size; j++) {
|
||||
struct pipe_ctx *temp;
|
||||
|
||||
if (pipe_set[j]->plane_state) {
|
||||
if (j == 0)
|
||||
break;
|
||||
|
||||
temp = pipe_set[0];
|
||||
pipe_set[0] = pipe_set[j];
|
||||
pipe_set[j] = temp;
|
||||
swap(pipe_set[0], pipe_set[j]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -2230,6 +2226,12 @@ void dc_commit_updates_for_stream(struct dc *dc,
|
|||
|
||||
copy_stream_update_to_stream(dc, context, stream, stream_update);
|
||||
|
||||
if (!dc->res_pool->funcs->validate_bandwidth(dc, context, false)) {
|
||||
DC_ERROR("Mode validation failed for stream update!\n");
|
||||
dc_release_state(context);
|
||||
return;
|
||||
}
|
||||
|
||||
commit_planes_for_stream(
|
||||
dc,
|
||||
srf_updates,
|
||||
|
|
|
|||
|
|
@ -799,7 +799,7 @@ static bool build_regamma(struct pwl_float_data_ex *rgb_regamma,
|
|||
pow_buffer_ptr = -1; // reset back to no optimize
|
||||
ret = true;
|
||||
release:
|
||||
kfree(coeff);
|
||||
kvfree(coeff);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -239,7 +239,7 @@ static void ci_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)
|
|||
|
||||
switch (dev_id) {
|
||||
case 0x67BA:
|
||||
case 0x66B1:
|
||||
case 0x67B1:
|
||||
smu_data->power_tune_defaults = &defaults_hawaii_pro;
|
||||
break;
|
||||
case 0x67B8:
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#include <drm/drm_print.h>
|
||||
#include <drm/drm_drv.h>
|
||||
#include <drm/drm_file.h>
|
||||
#include <drm/drm_sysfs.h>
|
||||
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
|
|
@ -511,6 +512,10 @@ int drm_connector_register(struct drm_connector *connector)
|
|||
drm_mode_object_register(connector->dev, &connector->base);
|
||||
|
||||
connector->registration_state = DRM_CONNECTOR_REGISTERED;
|
||||
|
||||
/* Let userspace know we have a new connector */
|
||||
drm_sysfs_hotplug_event(connector->dev);
|
||||
|
||||
goto unlock;
|
||||
|
||||
err_debugfs:
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/iopoll.h>
|
||||
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
|
|
@ -3498,6 +3499,17 @@ fail:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int do_get_act_status(struct drm_dp_aux *aux)
|
||||
{
|
||||
int ret;
|
||||
u8 status;
|
||||
|
||||
ret = drm_dp_dpcd_readb(aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, &status);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* drm_dp_check_act_status() - Check ACT handled status.
|
||||
|
|
@ -3507,33 +3519,29 @@ fail:
|
|||
*/
|
||||
int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr)
|
||||
{
|
||||
u8 status;
|
||||
int ret;
|
||||
int count = 0;
|
||||
/*
|
||||
* There doesn't seem to be any recommended retry count or timeout in
|
||||
* the MST specification. Since some hubs have been observed to take
|
||||
* over 1 second to update their payload allocations under certain
|
||||
* conditions, we use a rather large timeout value.
|
||||
*/
|
||||
const int timeout_ms = 3000;
|
||||
int ret, status;
|
||||
|
||||
do {
|
||||
ret = drm_dp_dpcd_readb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, &status);
|
||||
|
||||
if (ret < 0) {
|
||||
DRM_DEBUG_KMS("failed to read payload table status %d\n", ret);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
if (status & DP_PAYLOAD_ACT_HANDLED)
|
||||
break;
|
||||
count++;
|
||||
udelay(100);
|
||||
|
||||
} while (count < 30);
|
||||
|
||||
if (!(status & DP_PAYLOAD_ACT_HANDLED)) {
|
||||
DRM_DEBUG_KMS("failed to get ACT bit %d after %d retries\n", status, count);
|
||||
ret = -EINVAL;
|
||||
goto fail;
|
||||
ret = readx_poll_timeout(do_get_act_status, mgr->aux, status,
|
||||
status & DP_PAYLOAD_ACT_HANDLED || status < 0,
|
||||
200, timeout_ms * USEC_PER_MSEC);
|
||||
if (ret < 0 && status >= 0) {
|
||||
DRM_DEBUG_KMS("Failed to get ACT after %dms, last status: %02x\n",
|
||||
timeout_ms, status);
|
||||
return -EINVAL;
|
||||
} else if (status < 0) {
|
||||
DRM_DEBUG_KMS("Failed to read payload table status: %d\n",
|
||||
status);
|
||||
return status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
fail:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(drm_dp_check_act_status);
|
||||
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@ int drm_i2c_encoder_init(struct drm_device *dev,
|
|||
|
||||
err = encoder_drv->encoder_init(client, dev, encoder);
|
||||
if (err)
|
||||
goto fail_unregister;
|
||||
goto fail_module_put;
|
||||
|
||||
if (info->platform_data)
|
||||
encoder->slave_funcs->set_config(&encoder->base,
|
||||
|
|
@ -92,9 +92,10 @@ int drm_i2c_encoder_init(struct drm_device *dev,
|
|||
|
||||
return 0;
|
||||
|
||||
fail_module_put:
|
||||
module_put(module);
|
||||
fail_unregister:
|
||||
i2c_unregister_device(client);
|
||||
module_put(module);
|
||||
fail:
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -293,9 +293,6 @@ int drm_sysfs_connector_add(struct drm_connector *connector)
|
|||
return PTR_ERR(connector->kdev);
|
||||
}
|
||||
|
||||
/* Let userspace know we have a new connector */
|
||||
drm_sysfs_hotplug_event(dev);
|
||||
|
||||
if (connector->ddc)
|
||||
return sysfs_create_link(&connector->kdev->kobj,
|
||||
&connector->ddc->dev.kobj, "ddc");
|
||||
|
|
|
|||
|
|
@ -1292,8 +1292,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
|
|||
bool is_tc_port = intel_phy_is_tc(i915, phy);
|
||||
i915_reg_t ch_ctl, ch_data[5];
|
||||
u32 aux_clock_divider;
|
||||
enum intel_display_power_domain aux_domain =
|
||||
intel_aux_power_domain(intel_dig_port);
|
||||
enum intel_display_power_domain aux_domain;
|
||||
intel_wakeref_t aux_wakeref;
|
||||
intel_wakeref_t pps_wakeref;
|
||||
int i, ret, recv_bytes;
|
||||
|
|
@ -1308,6 +1307,8 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
|
|||
if (is_tc_port)
|
||||
intel_tc_port_lock(intel_dig_port);
|
||||
|
||||
aux_domain = intel_aux_power_domain(intel_dig_port);
|
||||
|
||||
aux_wakeref = intel_display_power_get(i915, aux_domain);
|
||||
pps_wakeref = pps_lock(intel_dp);
|
||||
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj)
|
|||
unsigned long last_pfn = 0; /* suppress gcc warning */
|
||||
unsigned int max_segment = i915_sg_segment_size();
|
||||
unsigned int sg_page_sizes;
|
||||
struct pagevec pvec;
|
||||
gfp_t noreclaim;
|
||||
int ret;
|
||||
|
||||
|
|
@ -188,13 +187,17 @@ err_sg:
|
|||
sg_mark_end(sg);
|
||||
err_pages:
|
||||
mapping_clear_unevictable(mapping);
|
||||
pagevec_init(&pvec);
|
||||
for_each_sgt_page(page, sgt_iter, st) {
|
||||
if (!pagevec_add(&pvec, page))
|
||||
if (sg != st->sgl) {
|
||||
struct pagevec pvec;
|
||||
|
||||
pagevec_init(&pvec);
|
||||
for_each_sgt_page(page, sgt_iter, st) {
|
||||
if (!pagevec_add(&pvec, page))
|
||||
check_release_pagevec(&pvec);
|
||||
}
|
||||
if (pagevec_count(&pvec))
|
||||
check_release_pagevec(&pvec);
|
||||
}
|
||||
if (pagevec_count(&pvec))
|
||||
check_release_pagevec(&pvec);
|
||||
sg_free_table(st);
|
||||
kfree(st);
|
||||
|
||||
|
|
|
|||
|
|
@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
|
|||
#define REG32(_reg, ...) \
|
||||
{ .addr = (_reg), __VA_ARGS__ }
|
||||
|
||||
#define REG32_IDX(_reg, idx) \
|
||||
{ .addr = _reg(idx) }
|
||||
|
||||
/*
|
||||
* Convenience macro for adding 64-bit registers.
|
||||
*
|
||||
|
|
@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
|
|||
REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
|
||||
REG32(BCS_SWCTRL),
|
||||
REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
|
||||
REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
|
||||
REG64_IDX(BCS_GPR, 0),
|
||||
REG64_IDX(BCS_GPR, 1),
|
||||
REG64_IDX(BCS_GPR, 2),
|
||||
|
|
|
|||
|
|
@ -3500,6 +3500,7 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
|
|||
|
||||
val = I915_READ(GEN11_DE_HPD_IMR);
|
||||
val &= ~hotplug_irqs;
|
||||
val |= ~enabled_irqs & hotplug_irqs;
|
||||
I915_WRITE(GEN11_DE_HPD_IMR, val);
|
||||
POSTING_READ(GEN11_DE_HPD_IMR);
|
||||
|
||||
|
|
|
|||
|
|
@ -1359,6 +1359,10 @@ static unsigned long a5xx_gpu_busy(struct msm_gpu *gpu)
|
|||
{
|
||||
u64 busy_cycles, busy_time;
|
||||
|
||||
/* Only read the gpu busy if the hardware is already active */
|
||||
if (pm_runtime_get_if_in_use(&gpu->pdev->dev) == 0)
|
||||
return 0;
|
||||
|
||||
busy_cycles = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_RBBM_0_LO,
|
||||
REG_A5XX_RBBM_PERFCTR_RBBM_0_HI);
|
||||
|
||||
|
|
@ -1367,6 +1371,8 @@ static unsigned long a5xx_gpu_busy(struct msm_gpu *gpu)
|
|||
|
||||
gpu->devfreq.busy_cycles = busy_cycles;
|
||||
|
||||
pm_runtime_put(&gpu->pdev->dev);
|
||||
|
||||
if (WARN_ON(busy_time > ~0LU))
|
||||
return ~0LU;
|
||||
|
||||
|
|
|
|||
|
|
@ -108,6 +108,13 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
|
|||
struct msm_gpu *gpu = &adreno_gpu->base;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* This can get called from devfreq while the hardware is idle. Don't
|
||||
* bring up the power if it isn't already active
|
||||
*/
|
||||
if (pm_runtime_get_if_in_use(gmu->dev) == 0)
|
||||
return;
|
||||
|
||||
gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);
|
||||
|
||||
gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,
|
||||
|
|
@ -134,6 +141,7 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
|
|||
* for now leave it at max so that the performance is nominal.
|
||||
*/
|
||||
icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
|
||||
pm_runtime_put(gmu->dev);
|
||||
}
|
||||
|
||||
void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
|
||||
|
|
|
|||
|
|
@ -803,6 +803,11 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
|
|||
struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
|
||||
u64 busy_cycles, busy_time;
|
||||
|
||||
|
||||
/* Only read the gpu busy if the hardware is already active */
|
||||
if (pm_runtime_get_if_in_use(a6xx_gpu->gmu.dev) == 0)
|
||||
return 0;
|
||||
|
||||
busy_cycles = gmu_read64(&a6xx_gpu->gmu,
|
||||
REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_L,
|
||||
REG_A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_H);
|
||||
|
|
@ -812,6 +817,8 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
|
|||
|
||||
gpu->devfreq.busy_cycles = busy_cycles;
|
||||
|
||||
pm_runtime_put(a6xx_gpu->gmu.dev);
|
||||
|
||||
if (WARN_ON(busy_time > ~0LU))
|
||||
return ~0LU;
|
||||
|
||||
|
|
|
|||
|
|
@ -1037,7 +1037,8 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
|
|||
|
||||
return 0;
|
||||
fail:
|
||||
mdp5_destroy(pdev);
|
||||
if (mdp5_kms)
|
||||
mdp5_destroy(pdev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
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Reference in a new issue