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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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sh: Kill off the rest of the legacy rtc mess.
With the new RTC class driver, we can get rid of most of the old left over cruft. Signed-off-by: Paul Mundt <[email protected]>
This commit is contained in:
Paul Mundt
parent
51e22e7a05
commit
91550f715b
9 changed files with 23 additions and 381 deletions
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@ -4,173 +4,4 @@
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#ifndef _ASM_MC146818RTC_H
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#define _ASM_MC146818RTC_H
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#ifdef CONFIG_SH_MPC1211
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#undef _ASM_MC146818RTC_H
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#undef RTC_IRQ
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#include <asm/mpc1211/mc146818rtc.h>
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#else
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#include <asm/rtc.h>
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#define RTC_ALWAYS_BCD 1
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/* FIXME:RTC Interrupt feature is not implemented yet. */
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#undef RTC_IRQ
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#define RTC_IRQ 0
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#if defined(CONFIG_CPU_SH3)
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#define RTC_PORT(n) (R64CNT+(n)*2)
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#define CMOS_READ(addr) __CMOS_READ(addr,b)
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#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b)
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#elif defined(CONFIG_SH_SECUREEDGE5410)
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#include <asm/snapgear.h>
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#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR
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#define CMOS_READ(addr) secureedge5410_cmos_read(addr)
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#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr)
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extern unsigned char secureedge5410_cmos_read(int addr);
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extern void secureedge5410_cmos_write(unsigned char val, int addr);
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#elif defined(CONFIG_CPU_SH4)
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#define RTC_PORT(n) (R64CNT+(n)*4)
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#define CMOS_READ(addr) __CMOS_READ(addr,w)
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#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w)
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#endif
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#define __CMOS_READ(addr, s) ({ \
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unsigned char val=0, rcr1, rcr2, r64cnt, retry; \
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switch(addr) { \
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case RTC_SECONDS: \
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val = ctrl_inb(RSECCNT); \
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break; \
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case RTC_SECONDS_ALARM: \
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val = ctrl_inb(RSECAR); \
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break; \
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case RTC_MINUTES: \
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val = ctrl_inb(RMINCNT); \
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break; \
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case RTC_MINUTES_ALARM: \
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val = ctrl_inb(RMINAR); \
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break; \
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case RTC_HOURS: \
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val = ctrl_inb(RHRCNT); \
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break; \
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case RTC_HOURS_ALARM: \
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val = ctrl_inb(RHRAR); \
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break; \
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case RTC_DAY_OF_WEEK: \
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val = ctrl_inb(RWKCNT); \
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break; \
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case RTC_DAY_OF_MONTH: \
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val = ctrl_inb(RDAYCNT); \
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break; \
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case RTC_MONTH: \
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val = ctrl_inb(RMONCNT); \
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break; \
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case RTC_YEAR: \
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val = ctrl_in##s(RYRCNT); \
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break; \
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case RTC_REG_A: /* RTC_FREQ_SELECT */ \
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rcr2 = ctrl_inb(RCR2); \
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val = (rcr2 & RCR2_PESMASK) >> 4; \
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rcr1 = ctrl_inb(RCR1); \
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rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\
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retry = 0; \
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do { \
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ctrl_outb(rcr1, RCR1); /* clear CF */ \
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r64cnt = ctrl_inb(R64CNT); \
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} while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\
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r64cnt ^= RTC_BIT_INVERTED; \
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if(r64cnt == 0x7f || r64cnt == 0) \
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val |= RTC_UIP; \
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break; \
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case RTC_REG_B: /* RTC_CONTROL */ \
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rcr1 = ctrl_inb(RCR1); \
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rcr2 = ctrl_inb(RCR2); \
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if(rcr1 & RCR1_CIE) val |= RTC_UIE; \
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if(rcr1 & RCR1_AIE) val |= RTC_AIE; \
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if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \
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if(!(rcr2 & RCR2_START))val |= RTC_SET; \
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val |= RTC_24H; \
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break; \
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case RTC_REG_C: /* RTC_INTR_FLAGS */ \
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rcr1 = ctrl_inb(RCR1); \
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rcr1 &= ~(RCR1_CF | RCR1_AF); \
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ctrl_outb(rcr1, RCR1); \
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rcr2 = ctrl_inb(RCR2); \
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rcr2 &= ~RCR2_PEF; \
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ctrl_outb(rcr2, RCR2); \
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break; \
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case RTC_REG_D: /* RTC_VALID */ \
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/* Always valid ... */ \
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val = RTC_VRT; \
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break; \
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default: \
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break; \
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} \
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val; \
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})
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#define __CMOS_WRITE(val, addr, s) ({ \
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unsigned char rcr1,rcr2; \
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switch(addr) { \
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case RTC_SECONDS: \
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ctrl_outb(val, RSECCNT); \
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break; \
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case RTC_SECONDS_ALARM: \
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ctrl_outb(val, RSECAR); \
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break; \
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case RTC_MINUTES: \
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ctrl_outb(val, RMINCNT); \
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break; \
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case RTC_MINUTES_ALARM: \
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ctrl_outb(val, RMINAR); \
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break; \
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case RTC_HOURS: \
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ctrl_outb(val, RHRCNT); \
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break; \
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case RTC_HOURS_ALARM: \
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ctrl_outb(val, RHRAR); \
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break; \
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case RTC_DAY_OF_WEEK: \
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ctrl_outb(val, RWKCNT); \
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break; \
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case RTC_DAY_OF_MONTH: \
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ctrl_outb(val, RDAYCNT); \
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break; \
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case RTC_MONTH: \
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ctrl_outb(val, RMONCNT); \
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break; \
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case RTC_YEAR: \
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ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\
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break; \
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case RTC_REG_A: /* RTC_FREQ_SELECT */ \
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rcr2 = ctrl_inb(RCR2); \
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if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \
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rcr2 |= RCR2_RESET; \
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ctrl_outb(rcr2, RCR2); \
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break; \
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case RTC_REG_B: /* RTC_CONTROL */ \
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rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \
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if(val & RTC_AIE) rcr1 |= RCR1_AIE; \
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else rcr1 &= ~RCR1_AIE; \
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if(val & RTC_UIE) rcr1 |= RCR1_CIE; \
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else rcr1 &= ~RCR1_CIE; \
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ctrl_outb(rcr1, RCR1); \
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rcr2 = ctrl_inb(RCR2); \
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if(val & RTC_SET) rcr2 &= ~RCR2_START; \
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else rcr2 |= RCR2_START; \
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ctrl_outb(rcr2, RCR2); \
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break; \
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case RTC_REG_C: /* RTC_INTR_FLAGS */ \
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break; \
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case RTC_REG_D: /* RTC_VALID */ \
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break; \
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default: \
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break; \
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} \
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})
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#endif /* CONFIG_SH_MPC1211 */
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#endif /* _ASM_MC146818RTC_H */
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@ -1,29 +1,8 @@
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#ifndef _ASM_RTC_H
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#define _ASM_RTC_H
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#ifdef __KERNEL__
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#include <asm/machvec.h>
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#include <asm/cpu/rtc.h>
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extern void sh_rtc_gettimeofday(struct timespec *ts);
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extern int sh_rtc_settimeofday(const time_t secs);
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extern void (*board_time_init)(void);
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extern void (*rtc_sh_get_time)(struct timespec *);
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extern int (*rtc_sh_set_time)(const time_t);
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/* RCR1 Bits */
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#define RCR1_CF 0x80 /* Carry Flag */
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#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
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#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
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#define RCR1_AF 0x01 /* Alarm Flag */
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/* RCR2 Bits */
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#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
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#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
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#define RCR2_RTCEN 0x08 /* ENable RTC */
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#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
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#define RCR2_RESET 0x02 /* Reset bit */
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#define RCR2_START 0x01 /* Start bit */
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#endif /* __KERNEL__ */
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#endif /* _ASM_RTC_H */
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