mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-15 09:14:18 -04:00
qcacmn: Refactor ol_sc for target_info and ini params
Clean up driver modules to query hif for the target info and ini handle, instead of accessing hif context in other modules. Change-Id: Ibd4762a20f788190f242b4f24b914fa4b99d5a5b CRs-Fixed: 967765
This commit is contained in:
parent
2443fb341a
commit
91553ce741
4 changed files with 108 additions and 111 deletions
114
hif/inc/hif.h
114
hif/inc/hif.h
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@ -145,10 +145,47 @@ struct qca_napi_data {
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struct qca_napi_info napis[CE_COUNT_MAX];
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};
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/**
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* struct hif_config_info - Place Holder for hif configuration
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* @enable_uart_print: UART Print
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* @enable_self_recovery: Self Recovery
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* @enable_fw_log: To Enable FW LOG
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* @enable_lpass_support: LPASS support
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* @enable_ramdump_collection: Ramdump Collection
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* @max_no_of_peers: Max Number of Peers
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*
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* Structure for holding ini parameters.
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*/
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struct hif_config_info {
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bool enable_uart_print;
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bool enable_self_recovery;
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bool enable_fw_log;
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bool enable_lpass_support;
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bool enable_ramdump_collection;
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uint8_t max_no_of_peers;
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};
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/**
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* struct hif_target_info - Target Information
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* @target_version: Target Version
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* @target_type: Target Type
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* @target_revision: Target Revision
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* @soc_version: SOC Version
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*
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* Structure to hold target information.
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*/
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struct hif_target_info {
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uint32_t target_version;
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uint32_t target_type;
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uint32_t target_revision;
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uint32_t soc_version;
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};
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struct ol_softc {
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void __iomem *mem; /* IO mapped memory base address */
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cdf_dma_addr_t mem_pa;
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uint32_t soc_version;
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struct hif_config_info hif_config;
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struct hif_target_info target_info;
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/*
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* handle for code that uses the osdep.h version of OS
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* abstraction primitives
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@ -164,20 +201,10 @@ struct ol_softc {
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*/
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cdf_device_t cdf_dev;
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struct ol_version version;
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/* Packet statistics */
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struct ol_ath_stats pkt_stats;
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/* A_TARGET_TYPE_* */
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uint32_t target_type;
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uint32_t target_fw_version;
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uint32_t target_version;
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uint32_t target_revision;
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uint8_t crm_version_string[64];
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uint8_t wlan_version_string[64];
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ol_target_status target_status;
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bool is_sim;
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/* calibration data is stored in flash */
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uint8_t *cal_in_flash;
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/* virtual address for the calibration data on the flash */
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@ -187,9 +214,7 @@ struct ol_softc {
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/* BMI info */
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/* OS-dependent private info for BMI */
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void *bmi_ol_priv;
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bool bmi_done;
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bool bmi_ua_done;
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uint8_t *bmi_cmd_buff;
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dma_addr_t bmi_cmd_da;
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OS_DMA_MEM_CONTEXT(bmicmd_dmacontext)
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@ -197,7 +222,6 @@ struct ol_softc {
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uint8_t *bmi_rsp_buff;
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dma_addr_t bmi_rsp_da;
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/* length of last response */
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uint32_t last_rxlen;
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OS_DMA_MEM_CONTEXT(bmirsp_dmacontext)
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void *msi_magic;
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@ -217,57 +241,7 @@ struct ol_softc {
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/* HTC handles */
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void *htc_handle;
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bool fEnableBeaconEarlyTermination;
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uint8_t bcnEarlyTermWakeInterval;
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/* UTF event information */
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struct {
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uint8_t *data;
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uint32_t length;
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cdf_size_t offset;
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uint8_t currentSeq;
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uint8_t expectedSeq;
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} utf_event_info;
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struct ol_wow_info *scn_wowInfo;
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/* enable uart/serial prints from target */
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bool enableuartprint;
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/* enable fwlog */
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bool enablefwlog;
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HAL_REG_CAPABILITIES hal_reg_capabilities;
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struct ol_regdmn *ol_regdmn_handle;
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uint8_t bcn_mode;
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uint8_t arp_override;
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/*
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* Includes host side stack level stats +
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* radio level athstats
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*/
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struct wlan_dbg_stats ath_stats;
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/* noise_floor */
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int16_t chan_nf;
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uint32_t min_tx_power;
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uint32_t max_tx_power;
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uint32_t txpowlimit2G;
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uint32_t txpowlimit5G;
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uint32_t txpower_scale;
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uint32_t chan_tx_pwr;
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uint32_t vdev_count;
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uint32_t max_bcn_ie_size;
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cdf_spinlock_t scn_lock;
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uint8_t vow_extstats;
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/* if dcs enabled or not */
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uint8_t scn_dcs;
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wdi_event_subscribe scn_rx_peer_invalid_subscriber;
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uint8_t proxy_sta;
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uint8_t bcn_enabled;
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/* Dynamic Tx Chainmask Selection enabled/disabled */
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uint8_t dtcs;
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/* true if vht ies are set on target */
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uint32_t set_ht_vht_ies:1;
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/*CWM enable/disable state */
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bool scn_cwmenable;
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uint8_t max_no_of_peers;
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#ifdef CONFIG_CNSS
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struct cnss_fw_files fw_files;
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#endif
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@ -276,11 +250,6 @@ struct ol_softc {
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unsigned long ramdump_address;
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unsigned long ramdump_size;
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#endif
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bool enable_self_recovery;
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#ifdef WLAN_FEATURE_LPSS
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bool enablelpasssupport;
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#endif
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bool enable_ramdump_collection;
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struct targetdef_s *targetdef;
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struct ce_reg_def *target_ce_def;
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struct hostdef_s *hostdef;
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@ -619,9 +588,6 @@ void hif_set_target_sleep(struct ol_softc *scn, bool sleep_ok,
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bool wait_for_it);
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int hif_check_fw_reg(struct ol_softc *scn);
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int hif_check_soc_status(struct ol_softc *scn);
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void hif_get_hw_info(void *scn, u32 *version, u32 *revision,
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const char **target_name);
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void hif_set_fw_info(void *scn, u32 target_fw_version);
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void hif_disable_isr(void *scn);
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void hif_reset_soc(void *scn);
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void hif_disable_aspm(void);
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@ -700,6 +666,10 @@ int hif_dump_registers(struct ol_softc *scn);
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int ol_copy_ramdump(struct ol_softc *scn);
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void hif_pktlogmod_exit(void *hif_ctx);
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void hif_crash_shutdown(void *hif_ctx);
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void hif_get_hw_info(struct ol_softc *scn, u32 *version, u32 *revision,
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const char **target_name);
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struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn);
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struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn);
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#ifdef __cplusplus
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}
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#endif
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@ -1535,6 +1535,8 @@ int hif_set_hia(struct ol_softc *scn)
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uint32_t chip_id;
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#endif
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uint32_t pipe_cfg_addr;
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struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
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uint32_t target_type = tgt_info->target_type;
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HIF_TRACE("%s: E", __func__);
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@ -1578,11 +1580,11 @@ int hif_set_hia(struct ol_softc *scn)
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offsetof(struct host_interest_area_t, hi_option_flag2);
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#else
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interconnect_targ_addr = hif_hia_item_address(scn->target_type,
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interconnect_targ_addr = hif_hia_item_address(target_type,
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offsetof(struct host_interest_s, hi_interconnect_state));
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ealloc_targ_addr = hif_hia_item_address(scn->target_type,
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ealloc_targ_addr = hif_hia_item_address(target_type,
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offsetof(struct host_interest_s, hi_early_alloc));
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flag2_targ_addr = hif_hia_item_address(scn->target_type,
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flag2_targ_addr = hif_hia_item_address(target_type,
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offsetof(struct host_interest_s, hi_option_flag2));
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#endif
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/* Supply Target-side CE configuration */
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@ -1679,10 +1681,10 @@ int hif_set_hia(struct ol_softc *scn)
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#ifndef QCA_WIFI_3_0
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/* configure early allocation */
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ealloc_targ_addr = hif_hia_item_address(scn->target_type,
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offsetof(
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struct host_interest_s,
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hi_early_alloc));
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ealloc_targ_addr = hif_hia_item_address(target_type,
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offsetof(
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struct host_interest_s,
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hi_early_alloc));
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rv = hif_diag_read_access(scn, ealloc_targ_addr,
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&ealloc_value);
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@ -1704,8 +1706,7 @@ int hif_set_hia(struct ol_softc *scn)
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goto done;
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}
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if (CHIP_ID_VERSION_GET(chip_id) == 0xD) {
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scn->target_revision =
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CHIP_ID_REVISION_GET(chip_id);
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tgt_info->target_revision = CHIP_ID_REVISION_GET(chip_id);
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switch (CHIP_ID_REVISION_GET(chip_id)) {
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case 0x2: /* ROME 1.3 */
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/* 2 banks are switched to IRAM */
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@ -1743,7 +1744,7 @@ int hif_set_hia(struct ol_softc *scn)
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#endif
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/* Tell Target to proceed with initialization */
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flag2_targ_addr = hif_hia_item_address(scn->target_type,
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flag2_targ_addr = hif_hia_item_address(target_type,
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offsetof(
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struct host_interest_s,
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hi_option_flag2));
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@ -1821,6 +1822,7 @@ int hif_config_ce(hif_handle_t hif_hdl)
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int ret;
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struct ol_softc *scn = hif_hdl;
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struct icnss_soc_info soc_info;
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struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
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/* if epping is enabled we need to use the epping configuration. */
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if (WLAN_IS_EPPING_ENABLED(cds_get_conparam())) {
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@ -1862,7 +1864,7 @@ int hif_config_ce(hif_handle_t hif_hdl)
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scn->hif_hdl = hif_state;
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scn->mem = soc_info.v_addr;
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scn->mem_pa = soc_info.p_addr;
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scn->soc_version = soc_info.version;
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tgt_info->soc_version = soc_info.version;
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cdf_spinlock_init(&hif_state->keep_awake_lock);
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@ -462,15 +462,17 @@ void hif_save_htc_htt_config_endpoint(int htc_endpoint)
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/**
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* hif_get_hw_name(): get a human readable name for the hardware
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* @info: Target Info
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*
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* Return: human readible name for the underlying wifi hardware.
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* Return: human readable name for the underlying wifi hardware.
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*/
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const char *hif_get_hw_name(struct ol_softc *scn)
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static const char *hif_get_hw_name(struct hif_target_info *info)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) {
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if (scn->target_version == qwlan_hw_list[i].id &&
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scn->target_revision == qwlan_hw_list[i].subid) {
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if (info->target_version == qwlan_hw_list[i].id &&
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info->target_revision == qwlan_hw_list[i].subid) {
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return qwlan_hw_list[i].name;
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}
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}
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@ -486,24 +488,13 @@ const char *hif_get_hw_name(struct ol_softc *scn)
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*
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* Return: n/a
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*/
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void hif_get_hw_info(void *scn, u32 *version, u32 *revision,
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void hif_get_hw_info(struct ol_softc *scn, u32 *version, u32 *revision,
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const char **target_name)
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{
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*version = ((struct ol_softc *)scn)->target_version;
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*revision = ((struct ol_softc *)scn)->target_revision;
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*target_name = hif_get_hw_name((struct ol_softc *)scn);
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}
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/**
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* hif_set_fw_info(): set the target_fw_version
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* @scn: scn
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* @target_fw_version: target_fw_version
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*
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* Return: n/a
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*/
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void hif_set_fw_info(void *scn, uint32_t target_fw_version)
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{
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((struct ol_softc *)scn)->target_fw_version = target_fw_version;
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struct hif_target_info *info = hif_get_target_info_handle(scn);
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*version = info->target_version;
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*revision = info->target_revision;
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*target_name = hif_get_hw_name(info);
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}
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/**
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@ -516,6 +507,7 @@ CDF_STATUS hif_open(enum ath_hal_bus_type bus_type)
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struct ol_softc *scn;
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v_CONTEXT_t cds_context;
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CDF_STATUS status = CDF_STATUS_SUCCESS;
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struct hif_config_info *cfg;
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cds_context = cds_get_global_context();
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status = cds_alloc_context(cds_context, CDF_MODULE_ID_HIF,
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@ -526,9 +518,8 @@ CDF_STATUS hif_open(enum ath_hal_bus_type bus_type)
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}
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cdf_mem_zero(scn, sizeof(*scn));
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scn->enableuartprint = 0;
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scn->enablefwlog = 0;
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scn->max_no_of_peers = 1;
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cfg = hif_get_ini_handle(scn);
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cfg->max_no_of_peers = 1;
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scn->pkt_log_init = false;
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cdf_atomic_init(&scn->wow_done);
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cdf_atomic_init(&scn->active_tasklet_cnt);
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@ -879,3 +870,33 @@ int hif_get_device_type(uint32_t device_id,
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end:
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return ret;
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}
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/**
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* Target info and ini parameters are global to the driver
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* Hence these structures are exposed to all the modules in
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* the driver and they don't need to maintains multiple copies
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* of the same info, instead get the handle from hif and
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* modify them in hif
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*/
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/**
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* hif_get_ini_handle() - API to get hif_config_param handle
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* @scn: HIF Context
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*
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* Return: pointer to hif_config_info
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*/
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struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn)
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{
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return &scn->hif_config;
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}
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/**
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* hif_get_target_info_handle() - API to get hif_target_info handle
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* @scn: HIF context
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*
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* Return: Pointer to hif_target_info
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*/
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struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn)
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{
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return &scn->target_info;
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}
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@ -2183,17 +2183,17 @@ void hif_reset_soc(void *ol_sc)
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{
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struct ol_softc *scn = (struct ol_softc *)ol_sc;
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struct hif_pci_softc *sc = scn->hif_sc;
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struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
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#if defined(CPU_WARM_RESET_WAR)
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/* Currently CPU warm reset sequence is tested only for AR9888_REV2
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* Need to enable for AR9888_REV1 once CPU warm reset sequence is
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* verified for AR9888_REV1
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*/
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if (scn->target_version == AR9888_REV2_VERSION) {
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if (tgt_info->target_version == AR9888_REV2_VERSION)
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hif_pci_device_warm_reset(sc);
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} else {
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else
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hif_pci_device_reset(sc);
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}
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#else
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hif_pci_device_reset(sc);
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#endif
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@ -2300,6 +2300,7 @@ hif_target_sleep_state_adjust(struct ol_softc *scn,
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static int max_delay;
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struct hif_pci_softc *sc = scn->hif_sc;
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static int debug;
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struct hif_config_info *cfg = hif_get_ini_handle(scn);
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if (scn->recovery)
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return -EACCES;
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@ -2416,7 +2417,7 @@ hif_target_sleep_state_adjust(struct ol_softc *scn,
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HIF_ERROR("%s:error, wakeup target",
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__func__);
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hif_msm_pcie_debug_info(sc);
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if (!sc->ol_sc->enable_self_recovery)
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if (!cfg->enable_self_recovery)
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CDF_BUG(0);
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scn->recovery = true;
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cds_set_recovery_in_progress(true);
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@ -2706,6 +2707,7 @@ CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
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int probe_again = 0;
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struct pci_dev *pdev = bdev;
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const struct pci_device_id *id = bid;
|
||||
struct hif_target_info *tgt_info;
|
||||
|
||||
HIF_TRACE("%s: con_mode = 0x%x, device_id = 0x%x",
|
||||
__func__, cds_get_conparam(), id->device);
|
||||
|
|
@ -2726,6 +2728,7 @@ CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
|
|||
ol_sc->aps_osdev.bc.bc_bustype = type;
|
||||
sc->devid = id->device;
|
||||
sc->cacheline_sz = dma_get_cache_alignment();
|
||||
tgt_info = hif_get_target_info_handle(ol_sc);
|
||||
again:
|
||||
ret = hif_enable_pci(sc, pdev, id);
|
||||
if (ret < 0) {
|
||||
|
|
@ -2766,7 +2769,8 @@ again:
|
|||
}
|
||||
HIF_TRACE("%s: hif_pci_probe_tgt_wakeup done", __func__);
|
||||
|
||||
ol_sc->target_type = target_type;
|
||||
tgt_info->target_type = target_type;
|
||||
|
||||
sc->soc_pcie_bar0 = pci_resource_start(pdev, BAR_NUM);
|
||||
if (!sc->soc_pcie_bar0) {
|
||||
HIF_ERROR("%s: ERROR - cannot get CE BAR0", __func__);
|
||||
|
|
|
|||
Loading…
Reference in a new issue