Pull altix-fpga-reset into release branch

This commit is contained in:
Tony Luck 2005-10-28 11:14:47 -07:00
commit 9189674026
4 changed files with 90 additions and 30 deletions

View file

@ -35,4 +35,16 @@
#define L1_BRICKTYPE_ATHENA 0x2b /* + */
#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
/* board type response codes */
#define L1_BOARDTYPE_IP69 0x0100 /* CA */
#define L1_BOARDTYPE_IP63 0x0200 /* CB */
#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */
#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */
#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */
#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */
#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */
#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */
#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */
#endif /* _ASM_IA64_SN_L1_H */

View file

@ -47,6 +47,7 @@
#define SN_SAL_CONSOLE_PUTB 0x02000028
#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
#define SN_SAL_CONSOLE_READC 0x0200002b
#define SN_SAL_SYSCTL_OP 0x02000030
#define SN_SAL_SYSCTL_MODID_GET 0x02000031
#define SN_SAL_SYSCTL_GET 0x02000032
#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
@ -100,6 +101,13 @@
#define SAL_INTR_ALLOC 1
#define SAL_INTR_FREE 2
/*
* operations available on the generic SN_SAL_SYSCTL_OP
* runtime service
*/
#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
/*
* IRouter (i.e. generalized system controller) operations
*/
@ -873,6 +881,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid)
return (int) rv.v0;
}
/*
* Ask the system controller on the specified nasid to reset
* the CX corelet clock. Only valid on TIO nodes.
*/
static inline int
ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
{
struct ia64_sal_retval rv;
SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
nasid, 0, 0, 0, 0, 0);
if (rv.status != 0)
return (int)rv.status;
if (rv.v0 != 0)
return (int)rv.v0;
return 0;
}
/*
* Get the associated ioboard type for a given nasid.
*/
static inline int
ia64_sn_sysctl_ioboard_get(nasid_t nasid)
{
struct ia64_sal_retval rv;
SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
nasid, 0, 0, 0, 0, 0);
if (rv.v0 != 0)
return (int)rv.v0;
if (rv.v1 != 0)
return (int)rv.v1;
return 0;
}
/**
* ia64_sn_get_fit_compt - read a FIT entry from the PROM header
* @nasid: NASID of node to read

View file

@ -19,6 +19,7 @@ struct cx_id_s {
struct cx_dev {
struct cx_id_s cx_id;
int bt; /* board/blade type */
void *soft; /* driver specific */
struct hubdev_info *hubdev;
struct device dev;
@ -59,7 +60,7 @@ struct cx_drv {
extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int);
extern void tiocx_irq_free(struct sn_irq_info *);
extern int cx_device_unregister(struct cx_dev *);
extern int cx_device_register(nasid_t, int, int, struct hubdev_info *);
extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
extern int cx_driver_unregister(struct cx_drv *);
extern int cx_driver_register(struct cx_drv *);
extern uint64_t tiocx_dma_addr(uint64_t addr);