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Merge branch 'pci/resource' into next

Browse source 
* pci/resource:
  microblaze/PCI: Remove pcibios_setup_bus_{self/devices} dead code
  ARC: Remove empty kernel/pcibios.c
  PCI: Add a generic weak pcibios_align_resource()
  PCI: Add a generic weak pcibios_fixup_bus()
This commit is contained in:
Bjorn Helgaas 2017-09-07 13:24:19 -05:00
commit 9198407e23
16 changed files with 22 additions and 265 deletions
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18
arch/tile/kernel/pci.c
View file

@ -66,16 +66,6 @@ static int pci_scan_flags[TILE_NUM_PCIE];
static struct pci_ops tile_cfg_ops;
/*
* We don't need to worry about the alignment of resources.
*/
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
EXPORT_SYMBOL(pcibios_align_resource);
/*
* Open a FD to the hypervisor PCI device.
*
@ -380,14 +370,6 @@ int __init pcibios_init(void)
}
subsys_initcall(pcibios_init);
/*
* No bus fixups needed.
*/
void pcibios_fixup_bus(struct pci_bus *bus)
{
/* Nothing needs to be done. */
}
void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling. */

14
arch/tile/kernel/pci_gx.c
View file

@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops;
/* Mask of CPUs that should receive PCIe interrupts. */
static struct cpumask intr_cpus_map;
/* We don't need to worry about the alignment of resources. */
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size,
resource_size_t align)
{
return res->start;
}
EXPORT_SYMBOL(pcibios_align_resource);
/*
* Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #.
* For now, we simply send interrupts to non-dataplane CPUs.
@ -1049,11 +1040,6 @@ alloc_mem_map_failed:
}
subsys_initcall(pcibios_init);
/* No bus fixups needed. */
void pcibios_fixup_bus(struct pci_bus *bus)
{
}
/* Process any "pci=" kernel boot arguments. */
char *__init pcibios_setup(char *str)
{