mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
The mxs cleanup for 3.10:
* Clean up timer code and move it into drivers/clocksource * Clean up icoll code and move it into drivers/irqchip * Clean up clock code to not include <mach/*> headers * Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*> headers * Clean up mach-mxs code to get it prepared for multiplatform support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJRYnwxAAoJEFBXWFqHsHzOs34H/iSLBv6I+f6oPubu52kJz6fP ctZPm6ZJPUKIiyVLLcmMf9kMr3h0wWH3XOBDzPdSj0Wtyb+rbpb/qa0jOg2EwZOs 2g+7LpehX2BgqKzdBPQEBC94NuU81F0X7SDZe0YechEWZY1VBGjaDnPso+Ugs23A 7hpjRHAOjd8gnJvkqU/uLKkbJiRX/pvXDcxkRhu15HsA9v6m18Elpq4FNw1QccLd 06o2M8aVvSL4IYy4Eh8lheUZrPNuyapG3TTjzhbYlPZtvXijFEFWniAQWyq5eGdg 3aiVbv3lCWYyJzFhmv9n6WYGqHthpnxej9ZMsREa1OVjmViDzSTda6vlhJvBOHQ= =neCB -----END PGP SIGNATURE----- Merge tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup From Shawn Guo <[email protected]>: The mxs cleanup for 3.10: * Clean up timer code and move it into drivers/clocksource * Clean up icoll code and move it into drivers/irqchip * Clean up clock code to not include <mach/*> headers * Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*> headers * Clean up mach-mxs code to get it prepared for multiplatform support * tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (26 commits) clocksource: mxs_timer: Add semicolon at end of line ARM: mxs: remove unused headers ARM: mxs: merge imx23 and imx28 into one machine_desc ARM: mxs: remove common.h ARM: mxs: move mxs_get_ocotp() into mach-mxs.c ARM: mxs: remove mm.c ARM: mxs: use debug_ll_io_init for low-level debug ARM: mxs: get ocotp base address from device tree ARM: mxs: remove system.c ARM: mxs: get reset address from device tree ARM: mxs: remove empty hardware.h ASoC: mxs-saif: remove mach header inclusion iio: mxs-lradc: remove unneeded mach header inclusion rtc: stmp3xxx: use stmp_reset_block() instead clk: mxs: remove the use of mach level IO accessor clk: mxs: get base address from device tree ARM: mxs: remove unneeded mach-types.h inclusion ARM: mxs: move icoll driver into drivers/irqchip ARM: mxs: call stmp_reset_block() in icoll ARM: mxs: get icoll base address from device tree ... Signed-off-by: Arnd Bergmann <[email protected]>
This commit is contained in:
Arnd Bergmann
commit
92202876a3
26 changed files with 279 additions and 990 deletions
|
|
@ -2,6 +2,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
|
|||
|
||||
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
|
||||
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
|
||||
obj-$(CONFIG_ARCH_MXS) += irq-mxs.o
|
||||
obj-$(CONFIG_METAG) += irq-metag-ext.o
|
||||
obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
|
||||
obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o
|
||||
|
|
|
|||
121
drivers/irqchip/irq-mxs.c
Normal file
121
drivers/irqchip/irq-mxs.c
Normal file
|
|
@ -0,0 +1,121 @@
|
|||
/*
|
||||
* Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/stmp_device.h>
|
||||
#include <asm/exception.h>
|
||||
|
||||
#include "irqchip.h"
|
||||
|
||||
#define HW_ICOLL_VECTOR 0x0000
|
||||
#define HW_ICOLL_LEVELACK 0x0010
|
||||
#define HW_ICOLL_CTRL 0x0020
|
||||
#define HW_ICOLL_STAT_OFFSET 0x0070
|
||||
#define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10)
|
||||
#define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10)
|
||||
#define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004
|
||||
#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
|
||||
|
||||
#define ICOLL_NUM_IRQS 128
|
||||
|
||||
static void __iomem *icoll_base;
|
||||
static struct irq_domain *icoll_domain;
|
||||
|
||||
static void icoll_ack_irq(struct irq_data *d)
|
||||
{
|
||||
/*
|
||||
* The Interrupt Collector is able to prioritize irqs.
|
||||
* Currently only level 0 is used. So acking can use
|
||||
* BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally.
|
||||
*/
|
||||
__raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0,
|
||||
icoll_base + HW_ICOLL_LEVELACK);
|
||||
}
|
||||
|
||||
static void icoll_mask_irq(struct irq_data *d)
|
||||
{
|
||||
__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
|
||||
icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq));
|
||||
}
|
||||
|
||||
static void icoll_unmask_irq(struct irq_data *d)
|
||||
{
|
||||
__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,
|
||||
icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq));
|
||||
}
|
||||
|
||||
static struct irq_chip mxs_icoll_chip = {
|
||||
.irq_ack = icoll_ack_irq,
|
||||
.irq_mask = icoll_mask_irq,
|
||||
.irq_unmask = icoll_unmask_irq,
|
||||
};
|
||||
|
||||
asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
u32 irqnr;
|
||||
|
||||
do {
|
||||
irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);
|
||||
if (irqnr != 0x7f) {
|
||||
__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);
|
||||
irqnr = irq_find_mapping(icoll_domain, irqnr);
|
||||
handle_IRQ(irqnr, regs);
|
||||
continue;
|
||||
}
|
||||
break;
|
||||
} while (1);
|
||||
}
|
||||
|
||||
static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
|
||||
irq_hw_number_t hw)
|
||||
{
|
||||
irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);
|
||||
set_irq_flags(virq, IRQF_VALID);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_domain_ops icoll_irq_domain_ops = {
|
||||
.map = icoll_irq_domain_map,
|
||||
.xlate = irq_domain_xlate_onecell,
|
||||
};
|
||||
|
||||
static void __init icoll_of_init(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
icoll_base = of_iomap(np, 0);
|
||||
WARN_ON(!icoll_base);
|
||||
|
||||
/*
|
||||
* Interrupt Collector reset, which initializes the priority
|
||||
* for each irq to level 0.
|
||||
*/
|
||||
stmp_reset_block(icoll_base + HW_ICOLL_CTRL);
|
||||
|
||||
icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,
|
||||
&icoll_irq_domain_ops, NULL);
|
||||
WARN_ON(!icoll_domain);
|
||||
}
|
||||
IRQCHIP_DECLARE(mxs, "fsl,icoll", icoll_of_init);
|
||||
Loading…
Reference in a new issue