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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 06:03:36 -04:00
qcacld-3.0: Remove IPA Tx system pipe setup for TX_FLOW_CONTROL_V2
The Tx system pipes are not needed for MCC when TX_FLOW_CONTROL_V2 is enabled, where per vdev descriptors are supported in firmware. Change-Id: I42ca1211af5a301db5fbbbfdd1876bd9065ab77a CRs-Fixed: 2150488
This commit is contained in:
Yun Park
snandini
parent
055d3ebf22
commit
9281cb7be8
1 changed files with 112 additions and 42 deletions
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@ -4859,29 +4859,19 @@ static int hdd_ipa_alloc_tx_desc_list(struct hdd_ipa_priv *hdd_ipa)
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return 0;
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}
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#ifndef QCA_LL_TX_FLOW_CONTROL_V2
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/**
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* hdd_ipa_setup_sys_pipe() - Setup all IPA Sys pipes
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* hdd_ipa_setup_tx_sys_pipe() - Setup IPA Tx system pipes
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* @hdd_ipa: Global HDD IPA context
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* @desc_fifo_sz: Number of descriptors
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*
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* Return: 0 on success, negative errno on error
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*/
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static int hdd_ipa_setup_sys_pipe(struct hdd_ipa_priv *hdd_ipa)
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static int hdd_ipa_setup_tx_sys_pipe(struct hdd_ipa_priv *hdd_ipa,
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int32_t desc_fifo_sz)
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{
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int i, ret = 0;
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qdf_ipa_sys_connect_params_t *ipa;
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uint32_t desc_fifo_sz;
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/* The maximum number of descriptors that can be provided to a BAM at
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* once is one less than the total number of descriptors that the buffer
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* can contain.
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* If max_num_of_descriptors = (BAM_PIPE_DESCRIPTOR_FIFO_SIZE / sizeof
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* (SPS_DESCRIPTOR)), then (max_num_of_descriptors - 1) descriptors can
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* be provided at once.
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* Because of above requirement, one extra descriptor will be added to
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* make sure hardware always has one descriptor.
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*/
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desc_fifo_sz = hdd_ipa->hdd_ctx->config->IpaDescSize
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+ sizeof(struct sps_iovec);
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/*setup TX pipes */
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for (i = 0; i < HDD_IPA_MAX_IFACE; i++) {
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@ -4914,41 +4904,115 @@ static int hdd_ipa_setup_sys_pipe(struct hdd_ipa_priv *hdd_ipa)
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if (ret) {
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HDD_IPA_LOG(QDF_TRACE_LEVEL_ERROR,
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"Failed for pipe %d ret: %d", i, ret);
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goto setup_sys_pipe_fail;
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return ret;
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}
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hdd_ipa->sys_pipe[i].conn_hdl_valid = 1;
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}
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return ret;
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}
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#else
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/**
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* hdd_ipa_setup_tx_sys_pipe() - Setup IPA Tx system pipes
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* @hdd_ipa: Global HDD IPA context
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* @desc_fifo_sz: Number of descriptors
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*
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* Return: 0 on success, negative errno on error
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*/
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static int hdd_ipa_setup_tx_sys_pipe(struct hdd_ipa_priv *hdd_ipa,
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int32_t desc_fifo_sz)
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{
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/*
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* The Tx system pipes are not needed for MCC when TX_FLOW_CONTROL_V2
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* is enabled, where per vdev descriptors are supported in firmware.
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*/
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return 0;
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}
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#endif
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/**
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* hdd_ipa_setup_rx_sys_pipe() - Setup IPA Rx system pipes
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* @hdd_ipa: Global HDD IPA context
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* @desc_fifo_sz: Number of descriptors
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*
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* Return: 0 on success, negative errno on error
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*/
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static int hdd_ipa_setup_rx_sys_pipe(struct hdd_ipa_priv *hdd_ipa,
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int32_t desc_fifo_sz)
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{
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int ret = 0;
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qdf_ipa_sys_connect_params_t *ipa;
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/*
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* Hard code it here, this can be extended if in case
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* PROD pipe is also per interface.
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* Right now there is no advantage of doing this.
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*/
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ipa = &hdd_ipa->sys_pipe[HDD_IPA_RX_PIPE].ipa_sys_params;
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ipa->client = IPA_CLIENT_WLAN1_PROD;
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ipa->desc_fifo_sz = desc_fifo_sz;
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ipa->priv = hdd_ipa;
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ipa->notify = hdd_ipa_w2i_cb;
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ipa->ipa_ep_cfg.nat.nat_en = IPA_BYPASS_NAT;
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ipa->ipa_ep_cfg.hdr.hdr_len = HDD_IPA_WLAN_RX_HDR_LEN;
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ipa->ipa_ep_cfg.hdr.hdr_ofst_metadata_valid = 1;
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ipa->ipa_ep_cfg.mode.mode = IPA_BASIC;
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if (!hdd_ipa_is_rm_enabled(hdd_ipa->hdd_ctx))
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ipa->keep_ipa_awake = 1;
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ret = qdf_ipa_setup_sys_pipe(ipa,
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&hdd_ipa->sys_pipe[HDD_IPA_RX_PIPE].conn_hdl);
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if (ret) {
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HDD_IPA_LOG(QDF_TRACE_LEVEL_ERROR,
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"Failed for RX pipe: %d", ret);
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return ret;
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}
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hdd_ipa->sys_pipe[HDD_IPA_RX_PIPE].conn_hdl_valid = 1;
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return ret;
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}
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/**
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* hdd_ipa_setup_sys_pipe() - Setup all IPA system pipes
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* @hdd_ipa: Global HDD IPA context
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*
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* Return: 0 on success, negative errno on error
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*/
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static int hdd_ipa_setup_sys_pipe(struct hdd_ipa_priv *hdd_ipa)
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{
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int i = HDD_IPA_MAX_IFACE, ret = 0;
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uint32_t desc_fifo_sz;
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/* The maximum number of descriptors that can be provided to a BAM at
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* once is one less than the total number of descriptors that the buffer
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* can contain.
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* If max_num_of_descriptors = (BAM_PIPE_DESCRIPTOR_FIFO_SIZE / sizeof
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* (SPS_DESCRIPTOR)), then (max_num_of_descriptors - 1) descriptors can
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* be provided at once.
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* Because of above requirement, one extra descriptor will be added to
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* make sure hardware always has one descriptor.
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*/
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desc_fifo_sz = hdd_ipa->hdd_ctx->config->IpaDescSize
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+ sizeof(struct sps_iovec);
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ret = hdd_ipa_setup_tx_sys_pipe(hdd_ipa, desc_fifo_sz);
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if (ret) {
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HDD_IPA_LOG(QDF_TRACE_LEVEL_ERROR,
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"Failed for TX pipe: %d", ret);
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goto setup_sys_pipe_fail;
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}
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if (!hdd_ipa_uc_sta_is_enabled(hdd_ipa->hdd_ctx)) {
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/*
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* Hard code it here, this can be extended if in case
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* PROD pipe is also per interface.
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* Right now there is no advantage of doing this.
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*/
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ipa = &hdd_ipa->sys_pipe[HDD_IPA_RX_PIPE].ipa_sys_params;
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ipa->client = IPA_CLIENT_WLAN1_PROD;
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ipa->desc_fifo_sz = desc_fifo_sz;
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ipa->priv = hdd_ipa;
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ipa->notify = hdd_ipa_w2i_cb;
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ipa->ipa_ep_cfg.nat.nat_en = IPA_BYPASS_NAT;
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ipa->ipa_ep_cfg.hdr.hdr_len = HDD_IPA_WLAN_RX_HDR_LEN;
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ipa->ipa_ep_cfg.hdr.hdr_ofst_metadata_valid = 1;
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ipa->ipa_ep_cfg.mode.mode = IPA_BASIC;
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if (!hdd_ipa_is_rm_enabled(hdd_ipa->hdd_ctx))
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ipa->keep_ipa_awake = 1;
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ret = qdf_ipa_setup_sys_pipe(ipa,
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&hdd_ipa->sys_pipe[i].conn_hdl);
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ret = hdd_ipa_setup_rx_sys_pipe(hdd_ipa, desc_fifo_sz);
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if (ret) {
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HDD_IPA_LOG(QDF_TRACE_LEVEL_ERROR,
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"Failed for RX pipe: %d", ret);
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"Failed for RX pipe: %d", ret);
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goto setup_sys_pipe_fail;
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}
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hdd_ipa->sys_pipe[HDD_IPA_RX_PIPE].conn_hdl_valid = 1;
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}
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/* Allocate free Tx desc list */
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@ -4960,8 +5024,10 @@ static int hdd_ipa_setup_sys_pipe(struct hdd_ipa_priv *hdd_ipa)
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setup_sys_pipe_fail:
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while (--i >= 0) {
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ipa_teardown_sys_pipe(hdd_ipa->sys_pipe[i].conn_hdl);
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for (i = 0; i < HDD_IPA_MAX_SYSBAM_PIPE; i++) {
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if (hdd_ipa->sys_pipe[i].conn_hdl_valid)
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qdf_ipa_teardown_sys_pipe(
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hdd_ipa->sys_pipe[i].conn_hdl);
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qdf_mem_zero(&hdd_ipa->sys_pipe[i],
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sizeof(struct hdd_ipa_sys_pipe));
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}
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@ -4984,8 +5050,8 @@ static void hdd_ipa_teardown_sys_pipe(struct hdd_ipa_priv *hdd_ipa)
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for (i = 0; i < HDD_IPA_MAX_SYSBAM_PIPE; i++) {
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if (hdd_ipa->sys_pipe[i].conn_hdl_valid) {
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ret = ipa_teardown_sys_pipe(hdd_ipa->sys_pipe[i].
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conn_hdl);
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ret = qdf_ipa_teardown_sys_pipe(
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hdd_ipa->sys_pipe[i].conn_hdl);
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if (ret)
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HDD_IPA_LOG(QDF_TRACE_LEVEL_ERROR, "Failed: %d",
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ret);
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@ -5869,6 +5935,10 @@ static QDF_STATUS __hdd_ipa_init(struct hdd_context *hdd_ctx)
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if (ret)
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goto fail_setup_rm;
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for (i = 0; i < HDD_IPA_MAX_SYSBAM_PIPE; i++)
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qdf_mem_zero(&hdd_ipa->sys_pipe[i],
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sizeof(struct hdd_ipa_sys_pipe));
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if (hdd_ipa_uc_is_enabled(hdd_ipa->hdd_ctx)) {
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hdd_ipa_uc_rt_debug_init(hdd_ctx);
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qdf_mem_zero(&hdd_ipa->stats, sizeof(hdd_ipa->stats));
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@ -5882,7 +5952,7 @@ static QDF_STATUS __hdd_ipa_init(struct hdd_context *hdd_ctx)
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hdd_ipa->sta_connected = 0;
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hdd_ipa->ipa_pipes_down = true;
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hdd_ipa->wdi_enabled = false;
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/* Setup IPA sys_pipe for MCC */
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/* Setup IPA system pipes */
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if (hdd_ipa_uc_sta_is_enabled(hdd_ipa->hdd_ctx)) {
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ret = hdd_ipa_setup_sys_pipe(hdd_ipa);
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if (ret)
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