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Allwinner drivers changes for 4.19
There's been work for this release cycles in both the SRAM controller driver in order to support more SoCs, as part of our VPU work, but also to enable the EMAC on the A64 (that needs to poke at registers within the same register space). Some work has been needed too to represent the bus to the display engine controllers that all need an SRAM to be mapped to the CPU to be able to access those controllers' registers. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAltXJkEACgkQ0rTAlCFN r3R00g/8CkjHrlXejLLTxjMGdVQYnmgVL3wPBbXaqi6wtg/ATLpXN5b5m+CbRZEJ cMyY4LVYMbmQ1aLwAUNlDzNbv5vxR5tYJ9X3x63wf1AlFPEwwOO0sy17yZp2J8Rx FFHx/dciQPbXkbOyIF+P+b49rO7gQ1dsbl5UyEA6nfeVmbPyeamwUdYy2559fkb1 3yWyTTUbXoEsDrKjuRf+tVdDr2ssTDqmT3qFTgl2jHZ5Bbyzq2aBH0NLBlk3G1te v4ceHRue/guEkjYnVEtIezhJMUwaDZcL5zuuRDINbT609mAMkO9he1Dz5BcvYe00 Rt5h304Nt6JSOM5iEDYnh1mzvdflm3ZR12/TTyxtmGVNB9PxVEj8z/0lT4rLOC7I H5uNxbM5eM6GQKQou+W8OXRPyuKJ8PXWWk58ajf0knMuIBcYOU0tdrFrWcPxaFXK VScPibv7NEs7np3mKc32L0WmsgHrfMK9mmgvFZFfhAgYM6oHM356bo+Jawrn3aJY aL/MQ3+rxjQBwUeNbZDnt4ROoM0hYUYt2s5dNiYY8sfhy37fwZz1Vrg810MLQLTA q/5VB7dEHGVQNZaYToo7RVegre3bMsYzG0DdZCKyZKaknJjH4hC67yOd5vD8wpMH WMCHx+s/3A0S/BRNjstV2UNFZfsJN8BHUDC/aYda1TJc9cbvSAo= =NuX/ -----END PGP SIGNATURE----- Merge tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers Allwinner drivers changes for 4.19 There's been work for this release cycles in both the SRAM controller driver in order to support more SoCs, as part of our VPU work, but also to enable the EMAC on the A64 (that needs to poke at registers within the same register space). Some work has been needed too to represent the bus to the display engine controllers that all need an SRAM to be mapped to the CPU to be able to access those controllers' registers. * tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: soc: sunxi: Add the A13, A23 and H3 system control compatibles drivers: soc: sunxi: Add support for the C1 SRAM region dt-bindings: sram: sunxi: Populate valid sections compatibles dt-bindings: sram: sunxi: Add A13, A20, A23 and H3 dedicated bindings soc: sunxi: sram: Add dt match for the A10 system-control compatible dt-bindings: sram: sunxi: Introduce new A10 binding for system-control bus: add bus driver for accessing Allwinner A64 DE2 dt-bindings: add binding for the Allwinner A64 DE2 bus soc: sunxi: sram: Add updated compatible string for A64 system control dt-bindings: sram: Rename A64 SRAM controller compatible soc: sunxi: export a regmap for EMAC clock reg on A64 Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
commit
92f06c384b
6 changed files with 208 additions and 6 deletions
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@ -103,6 +103,16 @@ config SIMPLE_PM_BUS
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Controller (BSC, sometimes called "LBSC within Bus Bridge", or
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"External Bus Interface") as found on several Renesas ARM SoCs.
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config SUN50I_DE2_BUS
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bool "Allwinner A64 DE2 Bus Driver"
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default ARM64
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depends on ARCH_SUNXI
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select SUNXI_SRAM
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help
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Say y here to enable support for Allwinner A64 DE2 bus driver. It's
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mostly transparent, but a SRAM region needs to be claimed in the SRAM
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controller to make the all blocks in the DE2 part accessible.
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config SUNXI_RSB
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tristate "Allwinner sunXi Reduced Serial Bus Driver"
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default MACH_SUN8I || MACH_SUN9I || ARM64
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@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
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obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
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obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o
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obj-$(CONFIG_SUN50I_DE2_BUS) += sun50i-de2.o
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obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
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obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
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obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
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48
drivers/bus/sun50i-de2.c
Normal file
48
drivers/bus/sun50i-de2.c
Normal file
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@ -0,0 +1,48 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Allwinner A64 Display Engine 2.0 Bus Driver
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*
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* Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
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*/
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/soc/sunxi/sunxi_sram.h>
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static int sun50i_de2_bus_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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int ret;
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ret = sunxi_sram_claim(&pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "Error couldn't map SRAM to device\n");
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return ret;
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}
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of_platform_populate(np, NULL, NULL, &pdev->dev);
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return 0;
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}
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static int sun50i_de2_bus_remove(struct platform_device *pdev)
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{
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sunxi_sram_release(&pdev->dev);
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return 0;
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}
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static const struct of_device_id sun50i_de2_bus_of_match[] = {
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{ .compatible = "allwinner,sun50i-a64-de2", },
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{ /* sentinel */ }
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};
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static struct platform_driver sun50i_de2_bus_driver = {
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.probe = sun50i_de2_bus_probe,
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.remove = sun50i_de2_bus_remove,
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.driver = {
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.name = "sun50i-de2-bus",
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.of_match_table = sun50i_de2_bus_of_match,
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},
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};
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builtin_platform_driver(sun50i_de2_bus_driver);
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