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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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The common clock framework changes for 3.8 are comprised of lots of
fixes for existing platforms as well as new ports for some ARM platforms. In addition there are new clk drivers for audio devices and MFDs. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQxtdeAAoJEDqPOy9afJhJwzUP/2/oaBAGXakQf+TTOsRo2IMh ejwgOxFsBcspR0OrJ73TAPDqbgY3xZ+BeVdvbIiYikcZLqT9dZsoN7oa9udcu6aL 1OxBT6F/CFnxUR4EVkpUdQ+vVIR8svxsAAv71zvaVGCeie0D7MDL2JgK8TvgRxHF DKxFYJ935CJC64JHJBYhW/1b4T/Tt94z/nYMijcQxkjmpEimTm/qLHpbK6OCQFUU fmvs3VmSA4p7hBmgXu3zp6NkOF3JJa7NWb+3kJh1UmqM7xh/CijxZP2YHhLkIdU1 g2qhYVKIIxmAFa7xJjXY05VrjMKvAkXGNJGVwCFQHnP17By4Pni3BDsQ+61u30Nj B/bIRrzAC17EOh6c6pAZIbNLTHHaQGe0XQMDuHGsjgmVpn2CTRmIduEVJPiq9wAk lNkwqh6Dftq72Xepy1RieqFuDOO8kHSsOPqS2e9A9yDuh5bzLsKlhKWKUahhxrML TnRBd7NfwctoEsKy42HtrXA2+iQsQDmHXNlec3ARNgWS3Hhre7qb1d0Q00y28OTA RWyPoxOn1O+wQsV2cu3I1LKVo9CmNU55evHG5zSDPIA3GsrMcPZmP/4KM9Vbs3Ye 5BIMtptUrOeZQ2PRxcTHnCbWvch5bQyvDkDiK/xR7XsiQIheE/0Ak8wGgVZ7TW4d 0zLm7UmmkmFu4xTwf2Nk =GoXf -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux Pull clock framework changes from Mike Turquette: "The common clock framework changes for 3.8 are comprised of lots of fixes for existing platforms as well as new ports for some ARM platforms. In addition there are new clk drivers for audio devices and MFDs." Fix up trivial conflict in <linux/clk-provider.h> (removal of 'inline' clashing with return type fixes) * tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (51 commits) MAINTAINERS: bad email address for Mike Turquette clk: introduce optional disable_unused callback clk: ux500: fix bit error clk: clock multiplexers may register out of order clk: ux500: Initial support for abx500 clock driver CLK: SPEAr: Remove unused dummy apb_pclk CLK: SPEAr: Correct index scanning done for clock synths CLK: SPEAr: Update clock rate table CLK: SPEAr: Add missing clocks CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks CLK: SPEAr13xx: fix parent names of multiple clocks CLK: SPEAr13xx: Fix mux clock names CLK: SPEAr: Fix dev_id & con_id for multiple clocks clk: move IM-PD1 clocks to drivers/clk clk: make ICST driver handle the VCO registers clk: add GPLv2 headers to the Versatile clock files clk: mxs: Use a better name for the USB PHY clock clk: spear: Add stub functions for spear3[0|1|2]0_clk_init() CLK: clk-twl6040: fix return value check in twl6040_clk_probe() clk: ux500: Register nomadik keypad clock lookups for u8500 ...
This commit is contained in:
Linus Torvalds
commit
93874681aa
43 changed files with 1491 additions and 573 deletions
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@ -8,43 +8,17 @@
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <mach/id.h>
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static struct cpufreq_frequency_table freq_table[] = {
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[0] = {
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.index = 0,
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.frequency = 200000,
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},
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[1] = {
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.index = 1,
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.frequency = 400000,
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},
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[2] = {
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.index = 2,
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.frequency = 800000,
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},
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[3] = {
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/* Used for MAX_OPP, if available */
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.index = 3,
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.frequency = CPUFREQ_TABLE_END,
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},
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[4] = {
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.index = 4,
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.frequency = CPUFREQ_TABLE_END,
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},
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};
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static enum arm_opp idx2opp[] = {
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ARM_EXTCLK,
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ARM_50_OPP,
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ARM_100_OPP,
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ARM_MAX_OPP
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};
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static struct cpufreq_frequency_table *freq_table;
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static struct clk *armss_clk;
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static struct freq_attr *db8500_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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@ -85,9 +59,9 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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for_each_cpu(freqs.cpu, policy->cpus)
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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/* request the PRCM unit for opp change */
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if (prcmu_set_arm_opp(idx2opp[idx])) {
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pr_err("db8500-cpufreq: Failed to set OPP level\n");
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/* update armss clk frequency */
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if (clk_set_rate(armss_clk, freq_table[idx].frequency * 1000)) {
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pr_err("db8500-cpufreq: Failed to update armss clk\n");
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return -EINVAL;
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}
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@ -100,25 +74,36 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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static unsigned int db8500_cpufreq_getspeed(unsigned int cpu)
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{
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int i;
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/* request the prcm to get the current ARM opp */
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for (i = 0; prcmu_get_arm_opp() != idx2opp[i]; i++)
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;
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return freq_table[i].frequency;
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int i = 0;
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unsigned long freq = clk_get_rate(armss_clk) / 1000;
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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if (freq <= freq_table[i].frequency)
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return freq_table[i].frequency;
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i++;
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}
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/* We could not find a corresponding frequency. */
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pr_err("db8500-cpufreq: Failed to find cpufreq speed\n");
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return 0;
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}
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static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy)
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{
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int i, res;
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int i = 0;
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int res;
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BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table));
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if (prcmu_has_arm_maxopp())
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freq_table[3].frequency = 1000000;
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armss_clk = clk_get(NULL, "armss");
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if (IS_ERR(armss_clk)) {
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pr_err("db8500-cpufreq : Failed to get armss clk\n");
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return PTR_ERR(armss_clk);
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}
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pr_info("db8500-cpufreq : Available frequencies:\n");
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for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
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while (freq_table[i].frequency != CPUFREQ_TABLE_END) {
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pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
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i++;
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}
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/* get policy fields based on the table */
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res = cpufreq_frequency_table_cpuinfo(policy, freq_table);
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@ -126,6 +111,7 @@ static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy)
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cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
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else {
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pr_err("db8500-cpufreq : Failed to read policy table\n");
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clk_put(armss_clk);
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return res;
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}
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@ -159,12 +145,35 @@ static struct cpufreq_driver db8500_cpufreq_driver = {
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.attr = db8500_cpufreq_attr,
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};
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static int db8500_cpufreq_probe(struct platform_device *pdev)
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{
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freq_table = dev_get_platdata(&pdev->dev);
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if (!freq_table) {
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pr_err("db8500-cpufreq: Failed to fetch cpufreq table\n");
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return -ENODEV;
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}
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return cpufreq_register_driver(&db8500_cpufreq_driver);
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}
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static struct platform_driver db8500_cpufreq_plat_driver = {
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.driver = {
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.name = "cpufreq-u8500",
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.owner = THIS_MODULE,
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},
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.probe = db8500_cpufreq_probe,
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};
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static int __init db8500_cpufreq_register(void)
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{
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if (!cpu_is_u8500_family())
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return -ENODEV;
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pr_info("cpufreq for DB8500 started\n");
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return cpufreq_register_driver(&db8500_cpufreq_driver);
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return platform_driver_register(&db8500_cpufreq_plat_driver);
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}
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device_initcall(db8500_cpufreq_register);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("cpufreq driver for DB8500");
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