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Merge "ARM: dts: msm: Enable L3 interconnect driver for direwolf"

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qctecmdr 2021-04-22 11:54:54 -07:00 • committed by Gerrit - the friendly Code Review server
commit 93eb49c757
1 changed files with 110 additions and 0 deletions
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110
qcom/direwolf.dtsi
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@ -5,6 +5,9 @@
#include <dt-bindings/clock/qcom,gcc-direwolf.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/interconnect/qcom,epss-l3.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,direwolf.h>
/ {
model = "Qualcomm Technologies, Inc. Direwolf";
@ -401,6 +404,10 @@
compatible = "qcom,direwolf-rpmh-clk";
#clock-cells = <1>;
};
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
};
pdc: interrupt-controller@b220000 {
@ -912,6 +919,109 @@
thermal_zones: thermal-zones {
};
clk_virt: interconnect@0 {
compatible = "qcom,direwolf-clk_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@1 {
compatible = "qcom,direwolf-mc_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
nspa_noc: interconnect@10c0000 {
compatible = "qcom,direwolf-nspa_noc";
reg = <0x10C0000 0x10000>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
config_noc: interconnect@1500000 {
compatible = "qcom,direwolf-config_noc";
reg = <0x1500000 0x2C000>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1680000 {
compatible = "qcom,direwolf-system_noc_main";
reg = <0x01680000 0x1A400>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc:interconnect@16c0000 {
compatible = "qcom,direwolf-aggre1_noc";
reg = <0x16C0000 0x3AF80>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,direwolf-aggre2_noc";
reg = <0x1700000 0x3AF80>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,direwolf-mmss_noc";
reg = <0x1740000 0x1FA80>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
lpass_ag_noc: interconnect@3c40000 {
compatible = "qcom,direwolf-lpass_ag_noc";
reg = <0x3C40000 0xF080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
dc_noc: interconnect@90e0000 {
compatible = "qcom,direwolf-dc_noc";
reg = <0x90E0000 0x5080>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9100000 {
compatible = "qcom,direwolf-gem_noc";
reg = <0x9100000 0xB8400>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
nspb_noc: interconnect@210C0000 {
compatible = "qcom,direwolf-nspb_noc";
reg = <0x210C0000 0x10000>;
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
epss_l3_cpu: l3_cpu@18590000 {
reg = <0x18590000 0x3000>;
compatible = "qcom,direwolf-epss-l3-cpu";
#interconnect-cells = <1>;
clock-names = "xo", "alternate";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_GPLL0>;
};
tlmm: pinctrl@f000000 {
compatible = "qcom,direwolf-pinctrl";
reg = <0x0F000000 0x1000000>;