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Merge branch 'pci/msi-affinity' into next

Browse source 
Conflicts:
	drivers/nvme/host/pci.c
This commit is contained in:
Bjorn Helgaas 2016-08-01 12:34:01 -05:00
commit 9454c23852
1008 changed files with 9995 additions and 6387 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/acpi/acpica/exconfig.c
View file

@ -108,7 +108,9 @@ acpi_ex_add_table(u32 table_index,
/* Add the table to the namespace */
acpi_ex_exit_interpreter();
status = acpi_ns_load_table(table_index, parent_node);
acpi_ex_enter_interpreter();
if (ACPI_FAILURE(status)) {
acpi_ut_remove_reference(obj_desc);
*ddb_handle = NULL;

144
drivers/acpi/acpica/hwregs.c
View file

@ -306,12 +306,6 @@ acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
{
u64 address;
u8 access_width;
u32 bit_width;
u8 bit_offset;
u64 value64;
u32 new_value32, old_value32;
u8 index;
acpi_status status;
ACPI_FUNCTION_NAME(hw_write);
@ -323,145 +317,23 @@ acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
return (status);
}
/* Convert access_width into number of bits based */
access_width = acpi_hw_get_access_bit_width(reg, 32);
bit_width = reg->bit_offset + reg->bit_width;
bit_offset = reg->bit_offset;
/*
* Two address spaces supported: Memory or IO. PCI_Config is
* not supported here because the GAS structure is insufficient
*/
index = 0;
while (bit_width) {
/*
* Use offset style bit reads because "Index * AccessWidth" is
* ensured to be less than 32-bits by acpi_hw_validate_register().
*/
new_value32 = ACPI_GET_BITS(&value, index * access_width,
ACPI_MASK_BITS_ABOVE_32
(access_width));
if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
status = acpi_os_write_memory((acpi_physical_address)
address, (u64)value,
reg->bit_width);
} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
if (bit_offset >= access_width) {
bit_offset -= access_width;
} else {
/*
* Use offset style bit masks because access_width is ensured
* to be less than 32-bits by acpi_hw_validate_register() and
* bit_offset/bit_width is less than access_width here.
*/
if (bit_offset) {
new_value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
}
if (bit_width < access_width) {
new_value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
}
if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
if (bit_offset || bit_width < access_width) {
/*
* Read old values in order not to modify the bits that
* are beyond the register bit_width/bit_offset setting.
*/
status =
acpi_os_read_memory((acpi_physical_address)
address +
index *
ACPI_DIV_8
(access_width),
&value64,
access_width);
old_value32 = (u32)value64;
/*
* Use offset style bit masks because access_width is
* ensured to be less than 32-bits by
* acpi_hw_validate_register() and bit_offset/bit_width is
* less than access_width here.
*/
if (bit_offset) {
old_value32 &=
ACPI_MASK_BITS_ABOVE
(bit_offset);
bit_offset = 0;
}
if (bit_width < access_width) {
old_value32 &=
ACPI_MASK_BITS_BELOW
(bit_width);
}
new_value32 |= old_value32;
}
value64 = (u64)new_value32;
status =
acpi_os_write_memory((acpi_physical_address)
address +
index *
ACPI_DIV_8
(access_width),
value64, access_width);
} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
if (bit_offset || bit_width < access_width) {
/*
* Read old values in order not to modify the bits that
* are beyond the register bit_width/bit_offset setting.
*/
status =
acpi_hw_read_port((acpi_io_address)
address +
index *
ACPI_DIV_8
(access_width),
&old_value32,
access_width);
/*
* Use offset style bit masks because access_width is
* ensured to be less than 32-bits by
* acpi_hw_validate_register() and bit_offset/bit_width is
* less than access_width here.
*/
if (bit_offset) {
old_value32 &=
ACPI_MASK_BITS_ABOVE
(bit_offset);
bit_offset = 0;
}
if (bit_width < access_width) {
old_value32 &=
ACPI_MASK_BITS_BELOW
(bit_width);
}
new_value32 |= old_value32;
}
status = acpi_hw_write_port((acpi_io_address)
address +
index *
ACPI_DIV_8
(access_width),
new_value32,
access_width);
}
}
/*
* Index * access_width is ensured to be less than 32-bits by
* acpi_hw_validate_register().
*/
bit_width -=
bit_width > access_width ? access_width : bit_width;
index++;
status = acpi_hw_write_port((acpi_io_address)
address, value, reg->bit_width);
}
ACPI_DEBUG_PRINT((ACPI_DB_IO,
"Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
value, access_width, ACPI_FORMAT_UINT64(address),
value, reg->bit_width, ACPI_FORMAT_UINT64(address),
acpi_ut_get_region_name(reg->space_id)));
return (status);

9
drivers/acpi/acpica/nsparse.c
View file

@ -47,6 +47,7 @@
#include "acparser.h"
#include "acdispat.h"
#include "actables.h"
#include "acinterp.h"
#define _COMPONENT ACPI_NAMESPACE
ACPI_MODULE_NAME("nsparse")
@ -170,6 +171,8 @@ acpi_ns_parse_table(u32 table_index, struct acpi_namespace_node *start_node)
ACPI_FUNCTION_TRACE(ns_parse_table);
acpi_ex_enter_interpreter();
/*
* AML Parse, pass 1
*
@ -185,7 +188,7 @@ acpi_ns_parse_table(u32 table_index, struct acpi_namespace_node *start_node)
status = acpi_ns_one_complete_parse(ACPI_IMODE_LOAD_PASS1,
table_index, start_node);
if (ACPI_FAILURE(status)) {
return_ACPI_STATUS(status);
goto error_exit;
}
/*
@ -201,8 +204,10 @@ acpi_ns_parse_table(u32 table_index, struct acpi_namespace_node *start_node)
status = acpi_ns_one_complete_parse(ACPI_IMODE_LOAD_PASS2,
table_index, start_node);
if (ACPI_FAILURE(status)) {
return_ACPI_STATUS(status);
goto error_exit;
}
error_exit:
acpi_ex_exit_interpreter();
return_ACPI_STATUS(status);
}

2
drivers/acpi/bus.c
View file

@ -1051,7 +1051,7 @@ static int __init acpi_bus_init(void)
* Maybe EC region is required at bus_scan/acpi_get_devices. So it
* is necessary to enable it as early as possible.
*/
acpi_boot_ec_enable();
acpi_ec_dsdt_probe();
printk(KERN_INFO PREFIX "Interpreter enabled\n");

29
drivers/acpi/ec.c
View file

@ -1446,10 +1446,30 @@ ec_parse_io_ports(struct acpi_resource *resource, void *context)
return AE_OK;
}
int __init acpi_boot_ec_enable(void)
static const struct acpi_device_id ec_device_ids[] = {
{"PNP0C09", 0},
{"", 0},
};
int __init acpi_ec_dsdt_probe(void)
{
if (!boot_ec)
acpi_status status;
if (boot_ec)
return 0;
/*
* Finding EC from DSDT if there is no ECDT EC available. When this
* function is invoked, ACPI tables have been fully loaded, we can
* walk namespace now.
*/
boot_ec = make_acpi_ec();
if (!boot_ec)
return -ENOMEM;
status = acpi_get_devices(ec_device_ids[0].id,
ec_parse_device, boot_ec, NULL);
if (ACPI_FAILURE(status) || !boot_ec->handle)
return -ENODEV;
if (!ec_install_handlers(boot_ec)) {
first_ec = boot_ec;
return 0;
@ -1457,11 +1477,6 @@ int __init acpi_boot_ec_enable(void)
return -EFAULT;
}
static const struct acpi_device_id ec_device_ids[] = {
{"PNP0C09", 0},
{"", 0},
};
#if 0
/*
* Some EC firmware variations refuses to respond QR_EC when SCI_EVT is not

2
drivers/acpi/internal.h
View file

@ -181,7 +181,7 @@ typedef int (*acpi_ec_query_func) (void *data);
int acpi_ec_init(void);
int acpi_ec_ecdt_probe(void);
int acpi_boot_ec_enable(void);
int acpi_ec_dsdt_probe(void);
void acpi_ec_block_transactions(void);
void acpi_ec_unblock_transactions(void);
void acpi_ec_unblock_transactions_early(void);

12
drivers/acpi/nfit.c
View file

@ -928,7 +928,7 @@ static ssize_t format_show(struct device *dev,
{
struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code));
return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
}
static DEVICE_ATTR_RO(format);
@ -961,8 +961,8 @@ static ssize_t format1_show(struct device *dev,
continue;
if (nfit_dcr->dcr->code == dcr->code)
continue;
rc = sprintf(buf, "%#x\n",
be16_to_cpu(nfit_dcr->dcr->code));
rc = sprintf(buf, "0x%04x\n",
le16_to_cpu(nfit_dcr->dcr->code));
break;
}
if (rc != ENXIO)
@ -1131,11 +1131,11 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
/*
* Until standardization materializes we need to consider up to 3
* different command sets. Note, that checking for function0 (bit0)
* tells us if any commands are reachable through this uuid.
* different command sets. Note, that checking for zero functions
* tells us if any commands might be reachable through this uuid.
*/
for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++)
if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 0))
break;
/* limit the supported commands to those that are publicly documented */

10
drivers/acpi/nfit.h
View file

@ -53,12 +53,12 @@ enum nfit_uuids {
};
/*
* Region format interface codes are stored as an array of bytes in the
* NFIT DIMM Control Region structure
* Region format interface codes are stored with the interface as the
* LSB and the function as the MSB.
*/
#define NFIT_FIC_BYTE cpu_to_be16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_be16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_be16(0x301) /* byte-addressable non-energy backed */
#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
enum {
NFIT_BLK_READ_FLUSH = 1,

2
drivers/acpi/pci_link.c
View file

@ -839,7 +839,7 @@ void acpi_penalize_isa_irq(int irq, int active)
{
if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty)))
acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) +
active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING;
(active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING);
}
bool acpi_isa_irq_available(int irq)

6
drivers/acpi/utils.c
View file

@ -680,9 +680,6 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs)
u64 mask = 0;
union acpi_object *obj;
if (funcs == 0)
return false;
obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL);
if (!obj)
return false;
@ -695,6 +692,9 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs)
mask |= (((u64)obj->buffer.pointer[i]) << (i * 8));
ACPI_FREE(obj);
if (funcs == 0)
return true;
/*
* Bit 0 indicates whether there's support for any functions other than
* function 0 for the specified UUID and revision.