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arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU
Architecturally, TLBs are private to the (physical) CPU they're associated with. But when multiple vcpus from the same VM are being multiplexed on the same CPU, the TLBs are not private to the vcpus (and are actually shared across the VMID). Let's consider the following scenario: - vcpu-0 maps PA to VA - vcpu-1 maps PA' to VA If run on the same physical CPU, vcpu-1 can hit TLB entries generated by vcpu-0 accesses, and access the wrong physical page. The solution to this is to keep a per-VM map of which vcpu ran last on each given physical CPU, and invalidate local TLBs when switching to a different vcpu from the same VM. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
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9 changed files with 66 additions and 2 deletions
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@ -54,6 +54,7 @@ extern char __kvm_hyp_vector[];
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extern void __kvm_flush_vm_context(void);
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extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa);
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extern void __kvm_tlb_flush_vmid(struct kvm *kvm);
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extern void __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu);
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extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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@ -62,6 +62,9 @@ struct kvm_arch {
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/* VTTBR value associated with above pgd and vmid */
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u64 vttbr;
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/* The last vcpu id that ran on each physical CPU */
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int __percpu *last_vcpu_ran;
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/* The maximum number of vCPUs depends on the used GIC model */
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int max_vcpus;
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@ -128,7 +128,7 @@ static inline unsigned long __kern_hyp_va(unsigned long v)
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return v;
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}
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#define kern_hyp_va(v) (typeof(v))(__kern_hyp_va((unsigned long)(v)))
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#define kern_hyp_va(v) ((typeof(v))(__kern_hyp_va((unsigned long)(v))))
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/*
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* We currently only support a 40bit IPA.
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@ -64,6 +64,21 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
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write_sysreg(0, vttbr_el2);
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}
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void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
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/* Switch to requested VMID */
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write_sysreg(kvm->arch.vttbr, vttbr_el2);
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isb();
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asm volatile("tlbi vmalle1" : : );
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dsb(nsh);
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isb();
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write_sysreg(0, vttbr_el2);
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}
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void __hyp_text __kvm_flush_vm_context(void)
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{
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dsb(ishst);
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