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fw-api: CL 7475518 - update fw common interface files
HTT/WMI: support flow override; specify multiple AST indices Change-Id: Ic111606c3452258181f75732d9aef0fe81ee4552 CRs-Fixed: 2262693
This commit is contained in:
spuligil
parent
51153e9748
commit
953625e11f
4 changed files with 250 additions and 13 deletions
174
fw/htt.h
174
fw/htt.h
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@ -188,9 +188,10 @@
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* 3.67 Add drop threshold field to HTT_H2T RX_RING_SELECTION_CFG msg.
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* 3.68 Add ipa_drop threshold fields to HTT_H2T_MSG_TYPE_SRING_SETUP
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* 3.69 Add htt_ul_ofdma_user_info_v0 defs
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* 3.70 Add AST1-AST3 fields to HTT_T2H PEER_MAP_V2 msg
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*/
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#define HTT_CURRENT_VERSION_MAJOR 3
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#define HTT_CURRENT_VERSION_MINOR 69
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#define HTT_CURRENT_VERSION_MINOR 70
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#define HTT_NUM_TX_FRAG_DESC 1024
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@ -7972,7 +7973,8 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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* to identify which peer the frame needs to be forwarded to (i.e. the
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* peer assocated with the Destination MAC Address within the packet),
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* and particularly which vdev needs to transmit the frame (for cases
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* of inter-vdev rx --> tx forwarding).
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* of inter-vdev rx --> tx forwarding). The HW peer id here is the same
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* meaning as AST_INDEX_0.
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* This DA-based peer ID that is provided for certain rx frames
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* (the rx frames that need to be re-transmitted as tx frames)
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* is the ID that the HW uses for referring to the peer in question,
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@ -7985,7 +7987,7 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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* |-----------------------------------------------------------------------|
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* | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 |
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* |-----------------------------------------------------------------------|
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* | HW peer ID | MAC addr 5 | MAC addr 4 |
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* | HW peer ID / AST index 0 | MAC addr 5 | MAC addr 4 |
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* |-----------------------------------------------------------------------|
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*
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*
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@ -8115,26 +8117,34 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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* is the ID that the HW uses for referring to the peer in question,
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* rather than the peer ID that the SW+FW use to refer to the peer.
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*
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* The HW peer id here is the same meaning as AST_INDEX_0.
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* Some chips support up to 4 AST indices per peer: AST_INDEX_0, AST_INDEX_1,
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* AST_INDEX_2, and AST_INDEX_3. AST 0 is always valid; for AST 1 through
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* AST 3, check the AST_VALID_MASK(3) to see if the corresponding extension
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* AST is valid.
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*
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* |31 24|23 16|15 8|7 0|
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* |31 28|27 24|23 20|19 17|16|15 8|7 0|
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* |-----------------------------------------------------------------------|
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* | SW peer ID | VDEV ID | msg type |
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* |-----------------------------------------------------------------------|
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* | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 |
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* |-----------------------------------------------------------------------|
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* | HW peer ID | MAC addr 5 | MAC addr 4 |
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* | HW peer ID / AST index 0 | MAC addr 5 | MAC addr 4 |
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* |-----------------------------------------------------------------------|
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* | Reserved_17_31 | Next Hop | AST Hash Value |
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* | Reserved_20_31 |ASTVM|NH| AST Hash Value |
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* |-----------------------------------------------------------------------|
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* | Reserved_0 |
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* | ASTFM3 | ASTFM2 | ASTFM1 | ASTFM0 | AST index 1 |
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* |-----------------------------------------------------------------------|
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* | Reserved_1 |
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* |TID valid low pri| TID valid hi pri| AST index 2 |
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* |-----------------------------------------------------------------------|
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* | Reserved_1 | AST index 3 |
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* |-----------------------------------------------------------------------|
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* | Reserved_2 |
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* |-----------------------------------------------------------------------|
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* | Reserved_3 |
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* |-----------------------------------------------------------------------|
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*
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* Where:
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* NH = Next Hop
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* ASTVM = AST valid mask
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* ASTFM = AST flow mask
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*
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* The following field definitions describe the format of the rx peer map v2
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* messages sent from the target to the host.
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@ -8158,7 +8168,7 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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* Bits 15:0
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* Purpose: Identifies which peer node the peer ID is for.
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* Value: upper 2 bytes of peer node's MAC address
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* - HW_PEER_ID
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* - HW_PEER_ID / AST_INDEX_0
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* Bits 31:16
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* Purpose: Identifies the HW peer ID corresponding to the peer MAC
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* address, so for rx frames marked for rx --> tx forwarding, the
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@ -8173,6 +8183,36 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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* Bit 16
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* Purpose: Bit indicates that a next_hop AST entry is used for WDS
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* (Wireless Distribution System).
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* - AST_VALID_MASK
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* Bits 19:17
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* Purpose: Indicate if the AST 1 through AST 3 are valid
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* - AST_INDEX_1
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* Bits 15:0
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* Purpose: indicate the second AST index for this peer
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* - AST_0_FLOW_MASK
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* Bits 19:16
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* Purpose: identify the which flow the AST 0 entry corresponds to.
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* - AST_1_FLOW_MASK
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* Bits 23:20
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* Purpose: identify the which flow the AST 1 entry corresponds to.
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* - AST_2_FLOW_MASK
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* Bits 27:24
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* Purpose: identify the which flow the AST 2 entry corresponds to.
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* - AST_3_FLOW_MASK
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* Bits 31:28
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* Purpose: identify the which flow the AST 3 entry corresponds to.
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* - AST_INDEX_2
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* Bits 15:0
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* Purpose: indicate the third AST index for this peer
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* - TID_VALID_HI_PRI
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* Bits 23:16
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* Purpose: identify if this peer's TIDs 0-7 support HI priority flow
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* - TID_VALID_LOW_PRI
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* Bits 31:24
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* Purpose: identify if this peer's TIDs 0-7 support Low priority flow
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* - AST_INDEX_3
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* Bits 15:0
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* Purpose: indicate the fourth AST index for this peer
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*/
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#define HTT_RX_PEER_MAP_V2_VDEV_ID_M 0xff00
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#define HTT_RX_PEER_MAP_V2_VDEV_ID_S 8
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@ -8188,6 +8228,29 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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#define HTT_RX_PEER_MAP_V2_AST_HASH_VALUE_S 0
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#define HTT_RX_PEER_MAP_V2_NEXT_HOP_M 0x00010000
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#define HTT_RX_PEER_MAP_V2_NEXT_HOP_S 16
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#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_M 0x000e0000
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#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S 17
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_M 0xffff
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_S 0
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#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_M 0x000f0000
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#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S 16
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#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_M 0x00f00000
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#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S 20
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#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_M 0x0f000000
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#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S 24
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#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_M 0xf0000000
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#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S 28
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_M 0xffff
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_S 0
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#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_M 0x00ff0000
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#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S 16
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#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_M 0xff000000
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#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S 24
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_M 0xffff
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_S 0
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#define HTT_RX_PEER_MAP_V2_VDEV_ID_SET(word, value) \
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do { \
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@ -8229,10 +8292,97 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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#define HTT_RX_PEER_MAP_V2_NEXT_HOP_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_NEXT_HOP_M) >> HTT_RX_PEER_MAP_V2_NEXT_HOP_S)
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#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_VALID_MASK, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_VALID_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_1, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_1_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_1_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_1_S)
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#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S)
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#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S)
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#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S)
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#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_2, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_2_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_2_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_2_S)
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#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_M) >> HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S)
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#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_M) >> HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_3, value); \
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(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_3_S; \
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} while (0)
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_GET(word) \
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(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_3_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_3_S)
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#define HTT_RX_PEER_MAP_V2_MAC_ADDR_OFFSET 4 /* bytes */
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#define HTT_RX_PEER_MAP_V2_HW_PEER_ID_OFFSET 8 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_HASH_INDEX_OFFSET 12 /* bytes */
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#define HTT_RX_PEER_MAP_V2_NEXT_HOP_OFFSET 12 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_OFFSET 12 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_OFFSET 16 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_X_FLOW_MASK_OFFSET 16 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_OFFSET 20 /* bytes */
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#define HTT_RX_PEER_MAP_V2_TID_VALID_LO_PRI_OFFSET 20 /* bytes */
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#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_OFFSET 20 /* bytes */
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#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_OFFSET 24 /* bytes */
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#define HTT_RX_PEER_MAP_V2_BYTES 32
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@ -398,6 +398,7 @@ typedef enum {
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WMI_SERVICE_PER_PEER_HTT_STATS_RESET = 213, /* FW supports HTT per peer stats reset facility */
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WMI_SERVICE_DELETE_ALL_PEER_SUPPORT = 214, /* target supports cmd to delete all peers within a vdev */
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WMI_SERVICE_DYNAMIC_HW_MODE_SWITCH_SUPPORT = 215, /* target supports Dynamic HW mode switch */
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WMI_SERVICE_MSDU_FLOW_OVERRIDE_BY_HOST = 216, /* target supports flow override feature */
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/******* ADD NEW SERVICES HERE *******/
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@ -3229,8 +3229,76 @@ typedef struct {
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* other - reserved.
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*/
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A_UINT32 ul_resp_config;
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/* msdu_flow_override_config0 - contains AST enable bitmask
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* AST0 is unconditionally enabled, unless the MSDU flow override feature
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* is entirely disabled.
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* AST1 through AST3 are conditionally enabled, based on bits 0-2 in
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* msdu_flow_override_config0.
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* If all three bits are 0, no msdu flow override feature at all in FW.
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*
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* The WMI_MSDU_FLOW_AST_ENABLE_GET and WMI_MSDU_FLOW_AST_ENABLE_SET
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* macros are used to read and write these bitfields.
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*/
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A_UINT32 msdu_flow_override_config0;
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/* msdu_flow_override_config1:
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* Bits 3:0 - AST0_FLOW_MASK(4)
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* Bits 7:4 - AST1_FLOW_MASK(4)
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* Bits 11:8 - AST2_FLOW_MASK(4)
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* Bits 15:12 - AST3_FLOW_MASK(4)
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* Bits 23:16 - TID_VALID_HI_PRI (8)
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* Bits 31:24 - TID_VALID_LOW_PRI (8)
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*
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* The macros
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* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET
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* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET
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* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET
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* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET
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* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET
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* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET
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* are used to read and write these bitfields.
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*/
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A_UINT32 msdu_flow_override_config1;
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} wmi_resource_config;
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#define WMI_MSDU_FLOW_AST_ENABLE_GET(msdu_flow_config0, ast_x) \
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(((ast_x) == 0) ? 1 : ((msdu_flow_config0) & (1 << ((ast_x) - 1))))
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#define WMI_MSDU_FLOW_AST_ENABLE_SET(msdu_flow_config0, ast_x, enable) \
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do { \
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if ((ast_x) == 0) break; \
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if ((enable)) { \
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(msdu_flow_config0) |= (1 << ((ast_x) - 1)); \
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} else { \
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(msdu_flow_config0) &= ~(1 << ((ast_x) - 1)); \
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} \
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} while(0)
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#define WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET(msdu_flow_config1, ast_x) \
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(((msdu_flow_config1) & (0x0f << ((ast_x) * 4))) >> ((ast_x) * 4))
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#define WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET( \
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msdu_flow_config1, ast_x, mask) \
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do { \
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||||
(msdu_flow_config1) &= ~(0xF << ((ast_x) * 4)); \
|
||||
(msdu_flow_config1) |= ((mask) << ((ast_x) * 4)); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET(msdu_flow_config1) \
|
||||
(((msdu_flow_config1) & 0xff0000) >> 16)
|
||||
#define WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET(msdu_flow_config1, mask) \
|
||||
do { \
|
||||
(msdu_flow_config1) &= ~0xff0000; \
|
||||
(msdu_flow_config1) |= ((mask) << 16); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET(msdu_flow_config1) \
|
||||
((msdu_flow_config1 & 0xff000000) >> 24)
|
||||
#define WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET(msdu_flow_config1, mask) \
|
||||
do { \
|
||||
(msdu_flow_config1) &= ~0xff000000; \
|
||||
(msdu_flow_config1) |= ((mask) << 24); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_RSRC_CFG_FLAG_SET(word32, flag, value) \
|
||||
do { \
|
||||
(word32) &= ~WMI_RSRC_CFG_FLAG_ ## flag ## _M; \
|
||||
|
|
@ -9862,6 +9930,24 @@ typedef enum {
|
|||
*/
|
||||
WMI_VDEV_PARAM_MCAST_RC_STALE_PERIOD, /* 0x94 */
|
||||
|
||||
/*
|
||||
* Bits 3:0 - AST0_FLOW_MASK(4)
|
||||
* Bits 7:4 - AST1_FLOW_MASK(4)
|
||||
* Bits 11:8 - AST2_FLOW_MASK(4)
|
||||
* Bits 15:12 - AST3_FLOW_MASK(4)
|
||||
* Bits 23:16 - TID_VALID_HI_PRI(8)
|
||||
* Bits 31:24 - TID_VALID_LOW_PRI(8)
|
||||
*
|
||||
* The below macros can be used to set/get the relevent fields.
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET(msdu_flow_config1, ast_x)
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET(msdu_flow_config1, ast_x, mask)
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET(msdu_flow_config1)
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET(msdu_flow_config1, mask)
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET(msdu_flow_config1)
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET(msdu_flow_config1, mask)
|
||||
*/
|
||||
WMI_VDEV_PARAM_MSDU_FLOW_OVERRIDE_CONFIG, /* 0x95 */
|
||||
|
||||
|
||||
/*=== ADD NEW VDEV PARAM TYPES ABOVE THIS LINE ===
|
||||
* The below vdev param types are used for prototyping, and are
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
#define __WMI_VER_MINOR_ 0
|
||||
/** WMI revision number has to be incremented when there is a
|
||||
* change that may or may not break compatibility. */
|
||||
#define __WMI_REVISION_ 685
|
||||
#define __WMI_REVISION_ 686
|
||||
|
||||
/** The Version Namespace should not be normally changed. Only
|
||||
* host and firmware of the same WMI namespace will work
|
||||
|
|
|
|||
Loading…
Reference in a new issue