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arm64: arch_timer: Add workaround for ARM erratum 1188873
When running on Cortex-A76, a timer access from an AArch32 EL0 task may end up with a corrupted value or register. The workaround for this is to trap these accesses at EL1/EL2 and execute them there. This only affects versions r0p0, r1p0 and r2p0 of the CPU. Acked-by: Mark Rutland <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Signed-off-by: Catalin Marinas <[email protected]>
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5 changed files with 39 additions and 1 deletions
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@ -319,6 +319,13 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
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}
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1188873
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static u64 notrace arm64_1188873_read_cntvct_el0(void)
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{
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return read_sysreg(cntvct_el0);
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}
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#endif
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#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
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DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
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EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
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@ -408,6 +415,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
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.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1188873
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{
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.match_type = ate_match_local_cap_id,
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.id = (void *)ARM64_WORKAROUND_1188873,
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.desc = "ARM erratum 1188873",
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.read_cntvct_el0 = arm64_1188873_read_cntvct_el0,
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},
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#endif
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};
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typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
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