diff --git a/bindings/mdss-dsi-panel.txt b/bindings/mdss-dsi-panel.txt
index 086fb76f0c73..de435b32c172 100644
--- a/bindings/mdss-dsi-panel.txt
+++ b/bindings/mdss-dsi-panel.txt
@@ -604,6 +604,8 @@ Optional properties:
 - qcom,dsi-panel-gpio-pins:		An u32 array consisting of all the GPIO pins used
 					for driving the DSI host and the panels
 					connected to the host.
+- qcom,dsi-panel-gpio-names:		A string array consisting of names of all the
+					GPIO pins used for driving the DSI host and panels.
 - qcom,mdss-dsi-ext-bridge-mode:	External bridge chip is connected instead of panel.
 - qcom,mdss-dsi-dma-schedule-line:	An integer value indicates the line number after vertical active
 					region for video mode panels and line number after TE for command mode
@@ -790,6 +792,7 @@ Example:
 
 		qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
 		qcom,dsi-panel-gpio-pins = <12 24 82>;
+		qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
 
 		qcom,mdss-dsi-display-timings {
 			wqhd {
diff --git a/display/lahaina-sde-display-common.dtsi b/display/lahaina-sde-display-common.dtsi
index c23cc4f3a018..4aa28560d687 100644
--- a/display/lahaina-sde-display-common.dtsi
+++ b/display/lahaina-sde-display-common.dtsi
@@ -127,6 +127,7 @@
 
 	qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
 	qcom,dsi-panel-gpio-pins = <12 24 82>;
+	qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
@@ -149,6 +150,10 @@
 	qcom,dsi-dyn-clk-list = <534712320 532484352 530256384>;
 	qcom,dsi-dyn-clk-type = "constant-fps-adjust-hfp";
 
+	qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
+	qcom,dsi-panel-gpio-pins = <12 24>;
+	qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio";
+
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
 			qcom,mdss-dsi-panel-phy-timings = [00 14 05 05 13 1f 05
@@ -166,6 +171,11 @@
 	qcom,mdss-dsi-min-refresh-rate = <60>;
 	qcom,mdss-dsi-max-refresh-rate = <120>;
 	qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
+
+	qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
+	qcom,dsi-panel-gpio-pins = <12 24>;
+	qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio";
+
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
 			qcom,mdss-dsi-panel-phy-timings = [00 1d 08 07 17 16 07
@@ -179,6 +189,11 @@
 &dsi_r66451_amoled_cmd {
 	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
 	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
+
+	qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
+	qcom,dsi-panel-gpio-pins = <12 24 82>;
+	qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
+
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
 			qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 12 1e 04