From b178f62b88625af2a61e5dc713871950b0b0df5b Mon Sep 17 00:00:00 2001
From: Sarthak Garg <sartgarg@qti.qualcomm.com>
Date: Fri, 18 Dec 2020 17:57:17 +0530
Subject: [PATCH] ARM: dts: msm: Add necessary changes for CQE enablement on
 sdxlemur

Add necessary changes for CQE enablement:

1) Add gpio based data lines (DAT[4:7]) to pinctrl file
2) Set VI recommended drive strength values for clk, cmd and data lines
3) Add clk scaling device tree support
4) Add CQE device tree flag.

Change-Id: I3f616cc73a0cd91029e19ee5160a6c9ba847c0ac
---
 qcom/sdxlemur-mtp-mbb-emmc.dtsi |  4 +++
 qcom/sdxlemur-pinctrl.dtsi      | 60 +++++++++++++++++++++++++++++++--
 2 files changed, 62 insertions(+), 2 deletions(-)

diff --git a/qcom/sdxlemur-mtp-mbb-emmc.dtsi b/qcom/sdxlemur-mtp-mbb-emmc.dtsi
index 7d4753791231..d1848edd40a0 100644
--- a/qcom/sdxlemur-mtp-mbb-emmc.dtsi
+++ b/qcom/sdxlemur-mtp-mbb-emmc.dtsi
@@ -13,6 +13,7 @@
 
 	bus-width = <8>;
 	non-removable;
+	supports-cqe;
 
 	vdd-supply = <&vreg_sd_vdd>;
 	qcom,vdd-voltage-level = <2950000 2950000>;
@@ -24,6 +25,9 @@
 	qcom,vdd-io-voltage-level = <1800000 1800000>;
 	qcom,vdd-io-current-level = <0 200000>;
 
+	qcom,devfreq,freq-table = <50000000 192000000>;
+	qcom,scaling-lower-bus-speed-mode = "DDR52";
+
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&sdc1_on>;
 	pinctrl-1 = <&sdc1_off>;
diff --git a/qcom/sdxlemur-pinctrl.dtsi b/qcom/sdxlemur-pinctrl.dtsi
index d336e3fa3eb4..d638723e2a75 100644
--- a/qcom/sdxlemur-pinctrl.dtsi
+++ b/qcom/sdxlemur-pinctrl.dtsi
@@ -50,13 +50,41 @@
 			cmd {
 				pins = "sdc1_cmd";
 				bias-pull-up;
-				drive-strength = <10>;
+				drive-strength = <16>;
 			};
 
 			data {
 				pins = "sdc1_data";
 				bias-pull-up;
-				drive-strength = <10>;
+				drive-strength = <16>;
+			};
+
+			data_4 {
+				pins = "gpio98";
+				function = "gpio";
+				drive-strength = <12>;
+				bias-pull-up;
+			};
+
+			data_5 {
+				pins = "gpio99";
+				function = "gpio";
+				drive-strength = <12>;
+				bias-pull-up;
+			};
+
+			data_6 {
+				pins = "gpio100";
+				function = "gpio";
+				drive-strength = <12>;
+				bias-pull-up;
+			};
+
+			data_7 {
+				pins = "gpio101";
+				function = "gpio";
+				drive-strength = <12>;
+				bias-pull-up;
 			};
 		};
 
@@ -78,6 +106,34 @@
 				bias-pull-up;
 				drive-strength = <2>;
 			};
+
+			data_4 {
+				pins = "gpio98";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			data_5 {
+				pins = "gpio99";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			data_6 {
+				pins = "gpio100";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			data_7 {
+				pins = "gpio101";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
 		};
 
 		sdc2_on: sdc2_on {