From 12e5fc2af52732724a65c9a079a20df4d73d7348 Mon Sep 17 00:00:00 2001
From: Tony Truong <truong@quicinc.com>
Date: Mon, 8 Feb 2021 17:45:58 -0800
Subject: [PATCH] ARM: dts: msm: add MHI register space info for PCIe on
 sdxlemur

Add MHI register space information for PCIe so feature such as
displaying ASPM stats is possible on sdxlemur.

Change-Id: I12c247b6e12134426d68ab4c7a3733136c877619
---
 qcom/sdxlemur-pcie.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/qcom/sdxlemur-pcie.dtsi b/qcom/sdxlemur-pcie.dtsi
index 50ca15604811..b433831ef634 100644
--- a/qcom/sdxlemur-pcie.dtsi
+++ b/qcom/sdxlemur-pcie.dtsi
@@ -7,8 +7,10 @@
 			<0x40000000 0xf1d>,
 			<0x40000f20 0xa8>,
 			<0x40001000 0x1000>,
-			<0x40100000 0x100000>;
-		reg-names = "parf", "phy", "dm_core", "elbi", "iatu", "conf";
+			<0x40100000 0x100000>,
+			<0x1c03000 0x1000>;
+		reg-names = "parf", "phy", "dm_core", "elbi", "iatu", "conf",
+			    "mhi";
 
 		cell-index = <0>;
 		linux,pci-domain = <0>;