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dt-bindings: devfreq: add support for different ddr types

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Target can support different DDR HW versions supporting different
frequencies, add support in DT to update the devfreq nodes
with corresponding frequency mapping based on DDR type supported.

Change-Id: If998c5181c7f8569259f528f07c5975ccd5b2f29
This commit is contained in:
Rama Aparna Mallavarapu 2019-05-14 16:25:31 -07:00 • committed by Gerrit - the friendly Code Review server
commit 96994d37c8
2 changed files with 40 additions and 8 deletions
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25
bindings/devfreq/arm-memlat-mon.txt
View file

@ -18,9 +18,14 @@ Optional properties:
- qcom,stall-cycle-ev: The stall cycle count that this monitor is supposed to measure.
Assumes 100% stall if not specified.
- qcom,ddr-type: Optional property indicates ddr type which can support
different frequencies for a given target.
Example:
#define DDR_TYPE_LPDDR3 5
#define DDR_TYPE_LPDDR4X 7
qcom,arm-memlat-mon {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <&CPU0 &CPU1>;
@ -28,8 +33,18 @@ Example:
qcom,cachemiss-ev = <0x2A>;
qcom,inst-ev = <0x08>;
qcom,stall-cycle-ev = <0xE7>;
qcom,core-dev-table =
< 300000 1525>,
< 499200 3143>,
< 1881600 5859>;
ddr3-map {
qcom,ddr-type = <DDR_TYPE_LPDDR3>;
qcom,core-dev-table =
< 300000 1525 >,
< 499200 3143 >,
< 1881600 5859 >;
};
ddr4-map {
qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
qcom,core-dev-table =
< 300000 1525 >,
< 499200 3143 >,
< 1881600 5859 >;
};
};

23
bindings/devfreq/devfreq_icc.txt
View file

@ -6,7 +6,7 @@ device is typically used to vote for BW requirements from a device's (Eg:
CPU, GPU) master port(s) to the slave (Eg: DDR) port(s).
Required properties:
- compatible: Must be "qcom,devfreq-icc"
- compatible: Must be "qcom,devfreq-icc" or "qcom,devfreq-icc-ddr" or "qcom,devfreq-icc-llcc"
- interconnects: Pairs of phandles and interconnect provider specificers
to denote the edge source and destination ports of the
desired interconnect path.
@ -15,44 +15,61 @@ Required properties:
requested from the device master port to the slave port.
The list of values depend on the supported bus/slave
frequencies and the bus width.
Optional properties:
- qcom,active-only: Indicates that the bandwidth votes need to be
enforced only when the CPU subsystem is active.
- governor: Initial governor to use for the device.
Default: "performance"
- opp-supported-hw: For the devices that are compatible with "qcom,devfreq-icc-ddr",
the OPP node can have opp-supported-hw property. This is a
single 32 bit bitmap value, representing compatible DDR-Type in HW.
Example:
Value:
0x80: Frequency Compatible for LPDDR4X only
0x100: Frequency Compatible for LPDDR5 only
0x180: Frequency Compatible for both LPDDR4X and LPDDR5
Example:
bw_opp_table: bw-opp-table {
compatible = "operating-points-v2";
opp-75 {
opp-hz = /bits/ 64 < 572 >; /* 75 MHz */
opp-supported-hw = <0x80>;
};
opp-150 {
opp-hz = /bits/ 64 < 1144 >; /* 150 MHz */
opp-supported-hw = <0x80>;
};
opp-200 {
opp-hz = /bits/ 64 < 1525 >; /* 200 MHz */
opp-supported-hw = <0x180>;
};
opp-307 {
opp-hz = /bits/ 64 < 2342 >; /* 307 MHz */
opp-supported-hw = <0x80>;
};
opp-460 {
opp-hz = /bits/ 64 < 3509 >; /* 460 MHz */
opp-supported-hw = <0x80>;
};
opp-614 {
opp-hz = /bits/ 64 < 4684 >; /* 614 MHz */
opp-supported-hw = <0x80>;
};
opp-800 {
opp-hz = /bits/ 64 < 6103 >; /* 800 MHz */
opp-supported-hw = <0x80>;
};
opp-931 {
opp-hz = /bits/ 64 < 7102 >; /* 931 MHz */
opp-supported-hw = <0x80>;
};
};
qcom,cpubw {
compatible = "qcom,devfreq-icc";
compatible = "qcom,devfreq-icc-ddr";
interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;
qcom,active-only;
operating-points-v2 = <&bw_opp_table>;