From 96d4625595793887f6441f5a0ec4c0bdf3e4d004 Mon Sep 17 00:00:00 2001 From: Paras Sharma Date: Wed, 13 Jan 2021 12:10:33 +0530 Subject: [PATCH] ARM: dts: msm: Add a new pinctrl state for lahaina This change adds new pinctrl state shutdown. Change-Id: Ifbaaeb6ef79ae1bb5d95d15b6961635f058cc7ee --- qcom/lahaina-qupv3.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/qcom/lahaina-qupv3.dtsi b/qcom/lahaina-qupv3.dtsi index 723b2eaab701..159c0977f21e 100644 --- a/qcom/lahaina-qupv3.dtsi +++ b/qcom/lahaina-qupv3.dtsi @@ -848,13 +848,15 @@ clocks = <&clock_gcc GCC_QUPV3_WRAP2_S4_CLK>, <&clock_gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, <&clock_gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; - pinctrl-names = "default", "active", "sleep"; + pinctrl-names = "default", "active", "sleep", "shutdown"; pinctrl-0 = <&qupv3_se18_default_cts>, <&qupv3_se18_default_rtsrx>, <&qupv3_se18_default_tx>; pinctrl-1 = <&qupv3_se18_ctsrx>, <&qupv3_se18_rts>, <&qupv3_se18_tx>; pinctrl-2 = <&qupv3_se18_ctsrx>, <&qupv3_se18_rts>, <&qupv3_se18_tx>; + pinctrl-3 = <&qupv3_se18_default_cts>, + <&qupv3_se18_default_rtsrx>, <&qupv3_se18_default_tx>; interrupts-extended = <&intc GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>, <&tlmm 71 IRQ_TYPE_LEVEL_HIGH>; qcom,wrapper-core = <&qupv3_2>;