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V4L/DVB: dib7000p: add disable sample and hold, and diversity delay parameter

Browse source 
This patch improves the overall driver performance in
diversity-reception scenarios.

Signed-off-by: Olivier Grenie <[email protected]>
Signed-off-by: Patrick Boettcher <[email protected]>
Cc: [email protected]
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
This commit is contained in:
Olivier Grenie 2010-09-07 12:50:46 -03:00 • committed by Mauro Carvalho Chehab
commit 970d14c6cc
3 changed files with 8 additions and 1 deletions
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1
drivers/media/dvb/dvb-usb/dib0700_devices.c
View file

@ -956,6 +956,7 @@ static struct dib7000p_config dib7770p_dib7000p_config = {
.hostbus_diversity = 1,
.enable_current_mirror = 1,
.disable_sample_and_hold = 0,
};
static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)

6
drivers/media/dvb/frontends/dib7000p.c
View file

@ -260,6 +260,7 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad
// dprintk( "908: %x, 909: %x\n", reg_908, reg_909);
reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4;
reg_908 |= (state->cfg.enable_current_mirror & 1) << 7;
dib7000p_write_word(state, 908, reg_908);
@ -780,7 +781,10 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
default:
case GUARD_INTERVAL_1_32: value *= 1; break;
}
state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO
if (state->cfg.diversity_delay == 0)
state->div_sync_wait = (value * 3) / 2 + 48; // add 50% SFN margin + compensate for one DVSY-fifo
else
state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; // add 50% SFN margin + compensate for one DVSY-fifo
/* deactive the possibility of diversity reception if extended interleaver */
state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K;

2
drivers/media/dvb/frontends/dib7000p.h
View file

@ -33,8 +33,10 @@ struct dib7000p_config {
int (*agc_control) (struct dvb_frontend *, u8 before);
u8 output_mode;
u8 disable_sample_and_hold : 1;
u8 enable_current_mirror : 1;
u8 diversity_delay;
};