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ARM: dts: msm: Update capacity-dmips-mhz values for Shima

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Update capacity-dmips-mhz value for prime CPU in Shima.

Change-Id: I61f5a5229d9f8564b6a47bba25177c743a954319
This commit is contained in:
Pavankumar Kondeti 2020-06-24 13:05:52 +05:30
commit 977848406d
1 changed files with 1 additions and 1 deletions
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qcom/shima.dtsi
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@ -162,7 +162,7 @@
reg = <0x0 0x700>;
enable-method = "psci";
qcom,freq-domain = <&cpufreq_hw 2 4>;
capacity-dmips-mhz = <1946>;
capacity-dmips-mhz = <1985>;
dynamic-power-coefficient = <552>;
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
next-level-cache = <&L2_7>;