: dts/nfc: change nfc VEN GPIO from 48 to 6

this change only for DVT2 later hardware
and only for JP SKU SN110P

Change-Id: Iae2d29cb49ed188243b3630bc341aba9ab1b5c52
Signed-off-by: zhangjun10 <zhangj10@motorola.com>
Reviewed-on: https://gerrit.mot.com/2393097
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
zhangjun10 2022-09-28 11:21:29 +08:00 • committed by panyq6
commit 9779dca53b
2 changed files with 80 additions and 0 deletions

View file

@ -101,9 +101,11 @@ blair-milanf-dvt1-overlay.dtbo-base := blair-moto-milanf-base.dtb
blair-milanf-dvt2-overlay.dtbo-base := blair-moto-milanf-base.dtb
dtbo-$(CONFIG_PENANG_DTB) += \
holi-penang-dvt2-jp-overlay.dtbo \
holi-penang-evt1-overlay.dtbo
holi-penang-evt1-overlay.dtbo-base := holi-moto-base.dtb
holi-penang-dvt2-jp-overlay.dtbo-base := holi-moto-base.dtb
dtbo-$(CONFIG_PNANGN_DTB) += \
holi-pnangn-evt1-overlay.dtbo

View file

@ -0,0 +1,78 @@
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "holi-penang-common-overlay.dtsi"
/ {
model = "penang";
compatible = "qcom,holi-penang", "qcom,holi-moto", "qcom,holi";
qcom,msm-id = <454 0x10000>, <472 0x10000>;
qcom,board-id = <(6<<8) 0xB200>;
};
&tlmm {
nfc {
sn110_enable_active: sn110_enable_active {
mux {
/* 6: Enable, 8: Firmware*/
pins = "gpio6";
function = "gpio";
};
config {
pins = "gpio6";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
sn110_enable_suspend: sn110_enable_suspend {
mux {
/* 6: Enable, 8: Firmware */
pins = "gpio6";
function = "gpio";
};
config {
pins = "gpio6";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
};
&qupv3_se7_i2c {
status = "ok"
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 9 0x00>;
qcom,sn-ven = <&tlmm 6 0x00>;
qcom,sn-firm = <&tlmm 8 0x00>;
qcom,sn-clkreq = <&tlmm 7 0x00>;
qcom,sn-vdd-1p8-supply = <&L9A>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <9 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &sn110_enable_active>;
pinctrl-1 = <&nfc_int_suspend &sn110_enable_suspend>;
};
};