A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "mmc: sdhci-msm: Port fixes from previous qcom SoCs to Lahaina"

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qctecmdr 2020-04-29 11:27:21 -07:00 • committed by Gerrit - the friendly Code Review server
commit 97b2f5ea8f
1 changed files with 9 additions and 7 deletions
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16
drivers/mmc/host/sdhci-msm.c
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@ -59,20 +59,21 @@
#define CORE_FLL_CYCLE_CNT BIT(18)
#define CORE_DLL_CLOCK_DISABLE BIT(21)
#define CORE_VENDOR_SPEC_POR_VAL 0xa1c
#define CORE_VENDOR_SPEC_POR_VAL 0xa9c
#define CORE_CLK_PWRSAVE BIT(1)
#define CORE_VNDR_SPEC_ADMA_ERR_SIZE_EN BIT(7)
#define CORE_HC_MCLK_SEL_DFLT (2 << 8)
#define CORE_HC_MCLK_SEL_HS400 (3 << 8)
#define CORE_HC_MCLK_SEL_MASK (3 << 8)
#define CORE_IO_PAD_PWR_SWITCH_EN (1 << 15)
#define CORE_IO_PAD_PWR_SWITCH (1 << 16)
#define CORE_IO_PAD_PWR_SWITCH_EN BIT(15)
#define CORE_IO_PAD_PWR_SWITCH BIT(16)
#define CORE_HC_SELECT_IN_EN BIT(18)
#define CORE_HC_SELECT_IN_HS400 (6 << 19)
#define CORE_HC_SELECT_IN_MASK (7 << 19)
#define CORE_8_BIT_SUPPORT (1 << 18)
#define CORE_3_0V_SUPPORT (1 << 25)
#define CORE_1_8V_SUPPORT (1 << 26)
#define CORE_8_BIT_SUPPORT BIT(18)
#define CORE_3_0V_SUPPORT BIT(25)
#define CORE_1_8V_SUPPORT BIT(26)
#define CORE_VOLT_SUPPORT (CORE_3_0V_SUPPORT | CORE_1_8V_SUPPORT)
#define CORE_SYS_BUS_SUPPORT_64_BIT BIT(28)
@ -713,7 +714,7 @@ static inline void msm_cm_dll_set_freq(struct sdhci_host *host)
mclk_freq = 5;
else if (host->clock <= 187000000)
mclk_freq = 6;
else if (host->clock <= 200000000)
else if (host->clock <= 208000000)
mclk_freq = 7;
config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
@ -3334,6 +3335,7 @@ static struct platform_driver sdhci_msm_driver = {
.remove = sdhci_msm_remove,
.driver = {
.name = "sdhci_msm",
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
.of_match_table = sdhci_msm_dt_match,
.pm = &sdhci_msm_pm_ops,
},