mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
MMC highlights for 3.15:
Core: - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior. - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V. - Add GPIO descriptor based slot-gpio card detect API. Drivers: - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c. - mmci: Support HW busy detection on ux500. - omap: Support MMC_ERASE. - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23. - rtsx: Support pre-req/post-req async. - sdhci: Add support for Realtek RTS5250 controllers. - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect. - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support. - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTRLHLAAoJEHNBYZ7TNxYMoqEQAOULXl1SHt0aHn5I0cfdVnRm J3i56MqarwXQOse/qJrg8/uKsggAu0ivTlQ7x1h6bpXmzHqvOtZhSoO9BqGEvxOU WNeA9ouaKMx3gCpIAwl9Odox+d2E+91nRfxU3fZTDITy554fREXmIpWiidjFPR7n 2oHT0yvGuLjunTC8MhxSB0OsggoIDXDTVPxrcf2k+AcAZAMlCMDNirN9+JbhiVM9 PNESapMyQAbFy18BGzCt5lO2o6aRileaSdX4BFTW4lx2LSPryUVV3cnfIH4zlytW joVDWyU5kAtQgfhoEhTsWJld+cwHsMUrl/FOfhMvBWbPMxLJnbFx8b459nKJDM5j NUo29KQxxHgWblGYx+F5SYuTloqWtX5iQWsez9g38Z/3UtjHR++o3+auwTFsZFRe 7EusZqsXdKggx1iiW/5afgb+tFOiCe5WOOQv29YdqWurPhaSK2Nr1aprD4RRiMeT IG9qBLhHFLl8Pv0nTdEGbJHhAhihja6w2ul+i/8JSaDOYAGFbEn47MC8JfrKAnpw WovxkSqMroMhjI+51cwJnVtdczQWx5kpjqDY0VaJlKvOfcwyOuyTU+s2vrHVDMZS a0HgaXeVxr5IcDTz2zo1f6UbM4k2z/Ka0LOOSPqyOYOpFuT6VkXhgOVq6fsRpnaN /9CUirULwF5ej0oz38hk =6S8w -----END PGP SIGNATURE----- Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.15: Core: - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V - Add GPIO descriptor based slot-gpio card detect API Drivers: - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c - mmci: Support HW busy detection on ux500 - omap: Support MMC_ERASE - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23 - rtsx: Support pre-req/post-req async - sdhci: Add support for Realtek RTS5250 controllers - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs" * tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits) mmc: sdhci-acpi: Intel SDIO has broken card detect mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller mmc: sdhci-msm: Add platform_execute_tuning implementation mmc: sdhci-msm: Initial support for Qualcomm chipsets mmc: sdhci-msm: Qualcomm SDHCI binding documentation sdhci: only reprogram retuning timer when flag is set mmc: rename ARCH_BCM to ARCH_BCM_MOBILE mmc: sdhci: Allow for irq being shared mmc: sdhci-acpi: Add device id 80860F16 mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14 mmc: slot-gpio: Add GPIO descriptor based CD GPIO API mmc: slot-gpio: Split out CD IRQ request into a separate function mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform" mmc: sdhci-spear: use generic card detection gpio support mmc: sdhci-spear: remove support for power gpio mmc: sdhci-spear: simplify resource handling mmc: sdhci-spear: fix platform_data usage mmc: sdhci-spear: fix error handling paths for DT mmc: sdhci-bcm-kona: fix build errors when built-in ...
This commit is contained in:
Linus Torvalds
commit
97e18dc007
63 changed files with 2577 additions and 1166 deletions
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@ -338,58 +338,28 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
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int num_sg, bool read, int timeout)
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{
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struct completion trans_done;
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u8 dir;
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int err = 0, i, count;
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int err = 0, count;
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long timeleft;
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unsigned long flags;
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struct scatterlist *sg;
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enum dma_data_direction dma_dir;
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u32 val;
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dma_addr_t addr;
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unsigned int len;
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dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg);
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/* don't transfer data during abort processing */
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if (pcr->remove_pci)
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return -EINVAL;
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if ((sglist == NULL) || (num_sg <= 0))
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return -EINVAL;
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if (read) {
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dir = DEVICE_TO_HOST;
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dma_dir = DMA_FROM_DEVICE;
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} else {
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dir = HOST_TO_DEVICE;
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dma_dir = DMA_TO_DEVICE;
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}
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count = dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
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count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read);
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if (count < 1) {
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dev_err(&(pcr->pci->dev), "scatterlist map failed\n");
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return -EINVAL;
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}
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dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count);
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val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
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pcr->sgi = 0;
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for_each_sg(sglist, sg, count, i) {
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addr = sg_dma_address(sg);
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len = sg_dma_len(sg);
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rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1);
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}
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spin_lock_irqsave(&pcr->lock, flags);
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pcr->done = &trans_done;
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pcr->trans_result = TRANS_NOT_READY;
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init_completion(&trans_done);
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rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr);
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rtsx_pci_writel(pcr, RTSX_HDBCTLR, val);
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spin_unlock_irqrestore(&pcr->lock, flags);
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rtsx_pci_dma_transfer(pcr, sglist, count, read);
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timeleft = wait_for_completion_interruptible_timeout(
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&trans_done, msecs_to_jiffies(timeout));
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if (timeleft <= 0) {
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@ -413,7 +383,7 @@ out:
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pcr->done = NULL;
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spin_unlock_irqrestore(&pcr->lock, flags);
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dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
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rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read);
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if ((err < 0) && (err != -ENODEV))
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rtsx_pci_stop_cmd(pcr);
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@ -425,6 +395,73 @@ out:
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}
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EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data);
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int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
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int num_sg, bool read)
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{
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enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
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if (pcr->remove_pci)
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return -EINVAL;
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if ((sglist == NULL) || num_sg < 1)
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return -EINVAL;
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return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir);
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}
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EXPORT_SYMBOL_GPL(rtsx_pci_dma_map_sg);
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int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
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int num_sg, bool read)
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{
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enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
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if (pcr->remove_pci)
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return -EINVAL;
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if (sglist == NULL || num_sg < 1)
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return -EINVAL;
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dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir);
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return num_sg;
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}
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EXPORT_SYMBOL_GPL(rtsx_pci_dma_unmap_sg);
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int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
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int sg_count, bool read)
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{
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struct scatterlist *sg;
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dma_addr_t addr;
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unsigned int len;
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int i;
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u32 val;
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u8 dir = read ? DEVICE_TO_HOST : HOST_TO_DEVICE;
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unsigned long flags;
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if (pcr->remove_pci)
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return -EINVAL;
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if ((sglist == NULL) || (sg_count < 1))
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return -EINVAL;
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val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
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pcr->sgi = 0;
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for_each_sg(sglist, sg, sg_count, i) {
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addr = sg_dma_address(sg);
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len = sg_dma_len(sg);
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rtsx_pci_add_sg_tbl(pcr, addr, len, i == sg_count - 1);
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}
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spin_lock_irqsave(&pcr->lock, flags);
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rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr);
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rtsx_pci_writel(pcr, RTSX_HDBCTLR, val);
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spin_unlock_irqrestore(&pcr->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rtsx_pci_dma_transfer);
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int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len)
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{
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int err;
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@ -836,6 +873,8 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id)
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int_reg = rtsx_pci_readl(pcr, RTSX_BIPR);
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/* Clear interrupt flag */
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rtsx_pci_writel(pcr, RTSX_BIPR, int_reg);
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dev_dbg(&pcr->pci->dev, "=========== BIPR 0x%8x ==========\n", int_reg);
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if ((int_reg & pcr->bier) == 0) {
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spin_unlock(&pcr->lock);
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return IRQ_NONE;
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@ -866,17 +905,28 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id)
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}
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if (int_reg & (NEED_COMPLETE_INT | DELINK_INT)) {
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if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) {
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if (int_reg & (TRANS_FAIL_INT | DELINK_INT))
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pcr->trans_result = TRANS_RESULT_FAIL;
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if (pcr->done)
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complete(pcr->done);
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} else if (int_reg & TRANS_OK_INT) {
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else if (int_reg & TRANS_OK_INT)
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pcr->trans_result = TRANS_RESULT_OK;
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if (pcr->done)
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complete(pcr->done);
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if (pcr->done)
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complete(pcr->done);
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if (int_reg & SD_EXIST) {
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struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD];
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if (slot && slot->done_transfer)
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slot->done_transfer(slot->p_dev);
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}
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if (int_reg & MS_EXIST) {
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struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD];
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if (slot && slot->done_transfer)
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slot->done_transfer(slot->p_dev);
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}
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}
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if (pcr->card_inserted || pcr->card_removed)
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schedule_delayed_work(&pcr->carddet_work,
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msecs_to_jiffies(200));
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