From b51f076234c2f627bc23819ec6da28979a702f48 Mon Sep 17 00:00:00 2001 From: Linyu Yuan Date: Mon, 12 Oct 2020 13:17:35 +0800 Subject: [PATCH] ARM: dts: msm: add USB3_DP_COM_TYPEC_STATUS register Add USB3_DP_COM_TYPEC_STATUS register for Lahaina and Shima, this register's bit0 is used indicates the type-c orientation. Change-Id: I42e35da3074497f24858a313ad4d9235b4729423 --- qcom/lahaina-usb.dtsi | 3 ++- qcom/shima-usb.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/qcom/lahaina-usb.dtsi b/qcom/lahaina-usb.dtsi index c0b48ff2a264..0f901b4857d9 100644 --- a/qcom/lahaina-usb.dtsi +++ b/qcom/lahaina-usb.dtsi @@ -177,7 +177,8 @@ USB3_DP_COM_RESET_OVRD_CTRL USB3_DP_COM_PHY_MODE_CTRL USB3_DP_COM_TYPEC_CTRL - USB3_DP_PCS_CLAMP_ENABLE>; + USB3_DP_PCS_CLAMP_ENABLE + USB3_DP_COM_TYPEC_STATUS>; qcom,qmp-phy-init-seq = /* */ diff --git a/qcom/shima-usb.dtsi b/qcom/shima-usb.dtsi index 48b5d3839b21..6e1d3e73b03a 100644 --- a/qcom/shima-usb.dtsi +++ b/qcom/shima-usb.dtsi @@ -148,7 +148,8 @@ USB3_DP_COM_RESET_OVRD_CTRL USB3_DP_COM_PHY_MODE_CTRL USB3_DP_COM_TYPEC_CTRL - USB3_DP_PCS_CLAMP_ENABLE>; + USB3_DP_PCS_CLAMP_ENABLE + USB3_DP_COM_TYPEC_STATUS>; qcom,qmp-phy-init-seq = /* */