From 983f7079d548e31eca37bebc87600fad59c3036c Mon Sep 17 00:00:00 2001
From: Mukesh Ojha <mojha@qti.qualcomm.com>
Date: Wed, 29 Jan 2020 14:33:51 +0530
Subject: [PATCH] ARM: dts: msm: Add pinctrl node for TLMM on Shima SoC

Add pinctrl node with compatiability of qcom,shima-pinctrl,
to enable Top Level Mode Multiplexer block(TLMM) on Shima SoC.

Change-Id: Iee97d663855df2578e751c82b6088e2db39db927
---
 qcom/shima-pinctrl.dtsi | 12 ++++++++++++
 qcom/shima.dtsi         |  2 ++
 2 files changed, 14 insertions(+)
 create mode 100644 qcom/shima-pinctrl.dtsi

diff --git a/qcom/shima-pinctrl.dtsi b/qcom/shima-pinctrl.dtsi
new file mode 100644
index 000000000000..1fe82f3a9f62
--- /dev/null
+++ b/qcom/shima-pinctrl.dtsi
@@ -0,0 +1,12 @@
+&soc {
+	tlmm: pinctrl@f000000 {
+		compatible = "qcom,shima-pinctrl";
+		reg = <0x0f000000 0x1000000>;
+		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+};
+
diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index d42501304581..66b228ae3d79 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -294,3 +294,5 @@
 		};
 	};
 };
+
+#include "shima-pinctrl.dtsi"