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ACPI: Processor native C-states using MWAIT
Intel processors starting with the Core Duo support support processor native C-state using the MWAIT instruction. Refer: Intel Architecture Software Developer's Manual http://www.intel.com/design/Pentium4/manuals/253668.htm Platform firmware exports the support for Native C-state to OS using ACPI _PDC and _CST methods. Refer: Intel Processor Vendor-Specific ACPI: Interface Specification http://www.intel.com/technology/iapc/acpi/downloads/302223.htm With Processor Native C-state, we use 'MWAIT' instruction on the processor to enter different C-states (C1, C2, C3). We won't use the special IO ports to enter C-state and no SMM mode etc required to enter C-state. Overall this will mean better C-state support. One major advantage of using MWAIT for all C-states is, with this and "treat interrupt as break event" feature of MWAIT, we can now get accurate timing for the time spent in C1, C2, .. states. Signed-off-by: Venkatesh Pallipadi <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Len Brown <[email protected]>
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@ -306,6 +306,8 @@ static inline void __mwait(unsigned long eax, unsigned long ecx)
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: :"a" (eax), "c" (ecx));
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}
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extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
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/* from system description table in BIOS. Mostly for MCA use, but
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others may find it useful. */
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extern unsigned int machine_id;
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