[PATCH] EDAC: e752x byte access fix

The reading of the DRA registers should be a byte at a time (one register at a
time) instead of 4 bytes at a time (four registers).  Reading a dword at a
time retrieves erroneous information from all but the first register.  A
change was made to read in each register in a loop prior to using the data in
those registers.

Signed-off-by: Brian Pomerantz <[email protected]>
Signed-off-by: Dave Jiang <[email protected]>
Signed-off-by: Doug Thompson <[email protected]>
Cc: Alan Cox <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: "Eric W. Biederman" <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Brian Pomerantz 2007-02-12 00:53:05 -08:00 • committed by Linus Torvalds
commit 9962fd017b

View file

@ -782,7 +782,12 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
u8 value;
u32 dra, drc, cumul_size;
pci_read_config_dword(pdev, E752X_DRA, &dra);
dra = 0;
for (index=0; index < 4; index++) {
u8 dra_reg;
pci_read_config_byte(pdev, E752X_DRA+index, &dra_reg);
dra |= dra_reg << (index * 8);
}
pci_read_config_dword(pdev, E752X_DRC, &drc);
drc_chan = dual_channel_active(ddrcsr);
drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */