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iommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH quirk(erratum 161010701)
HiSilicon SMMUv3 on Hip06/Hip07 platforms doesn't support CMD_PREFETCH command. The dt based support for this quirk is already present in the driver(hisilicon,broken-prefetch-cmd). This adds ACPI support for the quirk using the IORT smmu model number. Signed-off-by: shameer <[email protected]> Signed-off-by: hanjun <[email protected]> [will: rewrote patch] Signed-off-by: Will Deacon <[email protected]>
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2 changed files with 12 additions and 1 deletions
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@ -414,6 +414,10 @@
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#define MSI_IOVA_LENGTH 0x100000
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/* Until ACPICA headers cover IORT rev. C */
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#ifndef ACPI_IORT_SMMU_HISILICON_HI161X
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#define ACPI_IORT_SMMU_HISILICON_HI161X 0x1
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#endif
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#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX
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#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x2
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#endif
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@ -2616,8 +2620,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
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#ifdef CONFIG_ACPI
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static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu)
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{
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if (model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
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switch (model) {
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case ACPI_IORT_SMMU_V3_CAVIUM_CN99XX:
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smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY;
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break;
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case ACPI_IORT_SMMU_HISILICON_HI161X:
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smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH;
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break;
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}
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dev_notice(smmu->dev, "option mask 0x%x\n", smmu->options);
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}
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