From 955838aadb170aefb6ce9160fb6329e2cbb42298 Mon Sep 17 00:00:00 2001 From: Odelu Kukatla Date: Tue, 30 Mar 2021 21:49:34 +0530 Subject: [PATCH 1/2] icc: dt-bindings: add endpoint IDs for interconnects for YUPIK Add endpoint ID for GIC master which consumers can use to set bandwidth constraints and find paths in the NoC (Network-On-Chip) topology. Change-Id: I673888840c4dc2770ccb6d5dab76bab72c3af3cf Signed-off-by: Odelu Kukatla --- include/dt-bindings/interconnect/qcom,yupik.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/interconnect/qcom,yupik.h b/include/dt-bindings/interconnect/qcom,yupik.h index c035bf5593fa..fc68433990a8 100644 --- a/include/dt-bindings/interconnect/qcom,yupik.h +++ b/include/dt-bindings/interconnect/qcom,yupik.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_YUPIK_H @@ -58,6 +58,7 @@ #define MASTER_SDCC_4 49 #define MASTER_UFS_MEM 50 #define MASTER_USB3_0 51 +#define MASTER_GIC_1 52 #define SLAVE_EBI1 512 #define SLAVE_AHB2PHY_SOUTH 513 #define SLAVE_AHB2PHY_NORTH 514 From 10df13682935b955cc6981ebb94d070bacef6cc3 Mon Sep 17 00:00:00 2001 From: Odelu Kukatla Date: Tue, 30 Mar 2021 21:43:35 +0530 Subject: [PATCH 2/2] interconnect: qcom: yupik: Enable the QoS for GIC port Enable QoS configuration for GIC master port to set the default priority to P2. Change-Id: I16fca1e47be19bfe395ec71fc32ac66a664f9b4e Signed-off-by: Odelu Kukatla --- drivers/interconnect/qcom/yupik.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/interconnect/qcom/yupik.c b/drivers/interconnect/qcom/yupik.c index 7bb2053a2258..7eec1af9c0e1 100644 --- a/drivers/interconnect/qcom/yupik.c +++ b/drivers/interconnect/qcom/yupik.c @@ -849,6 +849,27 @@ static struct qcom_icc_node qxm_nsp = { .links = { SLAVE_CDSP_MEM_NOC }, }; +static struct qcom_icc_qosbox qhm_gic_qos = { + .regs = icc_qnoc_qos_regs[ICC_QNOC_QOSGEN_TYPE_RPMH], + .num_ports = 1, + .offsets = { 0x9000 }, + .config = &(struct qos_config) { + .prio = 2, + .urg_fwd = 0, + }, +}; + +static struct qcom_icc_node qhm_gic = { + .name = "qhm_gic", + .id = MASTER_GIC_1, + .channels = 1, + .buswidth = 4, + .noc_ops = &qcom_qnoc4_ops, + .qosbox = &qhm_gic_qos, + .num_links = 1, + .links = { SLAVE_SNOC_GEM_NOC_SF }, +}; + static struct qcom_icc_node qnm_aggre1_noc = { .name = "qnm_aggre1_noc", .id = MASTER_A1NOC_SNOC, @@ -2437,6 +2458,7 @@ static struct qcom_icc_bcm *system_noc_bcms[] = { }; static struct qcom_icc_node *system_noc_nodes[] = { + [MASTER_GIC_1] = &qhm_gic, [MASTER_A1NOC_SNOC] = &qnm_aggre1_noc, [MASTER_A2NOC_SNOC] = &qnm_aggre2_noc, [MASTER_SNOC_CFG] = &qnm_snoc_cfg,