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ARM: dts: msm: add reset control support for UFS PHY on Lahaina
Add reset control nodes for UFS PHY so that UFS PHY driver can control its SW reset through UFS host's address space. Change-Id: I8ef347733d611af7dfb1a9ecce10f8a5b5898e9b
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@ -960,6 +960,9 @@
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"ref_aux_clk";
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clocks = <&clock_rpmh RPMH_CXO_CLK>,
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<&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>;
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resets = <&ufshc_mem 0>;
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status = "disabled";
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};
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@ -969,6 +972,7 @@
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interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&ufsphy_mem>;
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phy-names = "ufsphy";
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#reset-cells = <1>;
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lanes-per-direction = <2>;
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dev-ref-clk-freq = <0>; /* 19.2 MHz */
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