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fbdev: powerpc: driver for Freescale 8610 and 5121 DIU
The following features are supported: plane 0 works as a regular frame buffer, can be accessed by /dev/fb0 plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and /dev/fb2 plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4 Special ioctls support AOIs All /dev/fb* can be used as regular frame buffer devices, except hardware change can only be made through /dev/fb0. Changing pixel clock has no effect on other fbs. Limitation of usage of AOIs: AOIs on the same plane can not be horizonally overlapped AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1 AOIs can not beyond phisical display area. Application should check AOI geometry before changing physical resolution on /dev/fb0 required command line parameters to preallocate memory for frame buffer diufb. optional command line parameters to set modes and monitor video=fslfb:[resolution][,bpp][,monitor] Syntax: Resolution xres x yres-bpp@refresh_rate, the -bpp and @refresh_rate are optional eg, 1024x768, 1280x1024, 1280x1024-32, 1280x1024@60, 1280x1024-32@60, 1280x480-32@60 Bpp bpp=32, bpp=24, or bpp=16 Monitor monitor=0, monitor=1, monitor=2 0 is DVI 1 is Single link LVDS 2 is Double link LVDS Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has three monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So switching monirot port for MPC5121ADS has no effect. If compiled as a module, it takes pamameters mode, bpp, monitor with the same syntax above. Signed-off-by: York Sun <[email protected]> Signed-off-by: Timur Tabi <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: "Antonino A. Daplas" <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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@ -2836,6 +2836,39 @@ platforms are moved over to use the flattened-device-tree model.
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big-endian;
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};
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r) Freescale Display Interface Unit
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The Freescale DIU is a LCD controller, with proper hardware, it can also
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drive DVI monitors.
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Required properties:
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- compatible : should be "fsl-diu".
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- reg : should contain at least address and length of the DIU register
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set.
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- Interrupts : one DIU interrupt should be describe here.
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Example (MPC8610HPCD)
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display@2c000 {
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compatible = "fsl,diu";
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reg = <0x2c000 100>;
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interrupts = <72 2>;
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interrupt-parent = <&mpic>;
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};
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s) Freescale on board FPGA
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This is the memory-mapped registers for on board FPGA.
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Required properities:
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- compatible : should be "fsl,fpga-pixis".
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- reg : should contain the address and the lenght of the FPPGA register
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set.
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Example (MPC8610HPCD)
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board-control@e8000000 {
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compatible = "fsl,fpga-pixis";
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reg = <0xe8000000 32>;
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};
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VII - Marvell Discovery mv64[345]6x System Controller chips
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===========================================================
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