From edb5de94d0b6b39753ffd979f102d8807a84e86f Mon Sep 17 00:00:00 2001 From: "Bao D. Nguyen" Date: Thu, 30 Apr 2020 00:03:14 -0700 Subject: [PATCH 1/2] dt-bindings: mmc: sdhci-msm: Add clk scaling dt parameters Add SD/eMMC clock scaling DT parameters. Change-Id: I7a196deffa2f6ae582a882189efb79bb435a931d --- bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/bindings/mmc/sdhci-msm.txt b/bindings/mmc/sdhci-msm.txt index da4edb146a98..0553bfadb19f 100644 --- a/bindings/mmc/sdhci-msm.txt +++ b/bindings/mmc/sdhci-msm.txt @@ -39,6 +39,21 @@ Required properties: "cal" - reference clock for RCLK delay calibration (optional) "sleep" - sleep clock for RCLK delay calibration (optional) +Optional properties: +- devfreq,freq-table - specifies supported frequencies for clock scaling. + Clock scaling logic shall toggle between these frequencies based + on card load. In case the defined frequencies are over or below + the supported card frequencies, they will be overridden + during card init. In case this entry is not supplied, + the driver will construct one based on the card + supported max and min frequencies. + The frequencies must be ordered from lowest to highest. + +- scaling-lower-bus-speed-mode - Few hosts can support DDR52 mode at the + same lower system voltage corner as high-speed mode. In such + cases, it is always better to put it in DDR mode which will + improve the performance without any power impact. + Example: sdhc_1: sdhci@f9824900 { @@ -73,4 +88,7 @@ Example: clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; clock-names = "core", "iface"; + + qcom,devfreq,freq-table = <50000000 200000000>; + qcom,scaling-lower-bus-speed-mode = "DDR52"; }; From 7935e94e38ee0553b9bf26bcf4b53ef4b653893d Mon Sep 17 00:00:00 2001 From: "Bao D. Nguyen" Date: Thu, 23 Apr 2020 02:09:20 -0700 Subject: [PATCH 2/2] ARM: dts: msm: Enable SD card clock scaling on Lahaina Enable the SD card clock scaling support for Lahaina platforms. Change-Id: Ie4232e9fc73a465b59138ecee08e7b1334635b8d --- qcom/lahaina.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index cc7a0b382d15..4c55b761120a 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -3143,6 +3143,8 @@ qcom,dll-hsr-list = <0x0007642C 0xA800 0x10 0x2C010800 0x80040868>; + qcom,scaling-lower-bus-speed-mode = "DDR52"; + iommus = <&apps_smmu 0x4a0 0x0>; dma-coherent;