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ARM: dts: qcom: Enable thermal zones and cooling devices for sa8195

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Enable TSENS different thermal zones like userspace thermal zones,
CPU isolation thermal zones, gpu max thermal zones, CDSP, NPU
thermal zones and pmic alarm thermal zones etc. and different
cooling devices for sa8195.

Change-Id: I9cabba6e2d11875c869480e11501a24ff2eb7327
This commit is contained in:
Manaf Meethalavalappu Pallikunhi 2020-12-24 15:57:33 +05:30
commit 9c6bd0d9be
4 changed files with 1269 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

166
qcom/sa8195-pmic.dtsi
View file

@ -59,6 +59,13 @@
/delete-node/ refgen;
};
&lmh_dcvs1 {
isens_vref_0p8-supply = <&pm8195_3_l5>;
isens-vref-0p8-settings = <880000 880000 20000>;
isens_vref_1p8-supply = <&pm8195_1_l12>;
isens-vref-1p8-settings = <1800000 1800000 20000>;
};
&camcc {
vdd_mx-supply = <&VDD_MX_LEVEL>;
vdd_mm-supply = <&VDD_MMCX_LEVEL>;
@ -97,6 +104,59 @@
type = "critical";
};
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_1_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_1_trip1>;
cooling-device =
<&CPU0 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip1_cpu1 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu1_isolate 1 1>;
};
trip1_cpu2 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu2_isolate 1 1>;
};
trip1_cpu3 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu3_isolate 1 1>;
};
trip1_cpu4 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu4_isolate 1 1>;
};
trip1_cpu5 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu5_isolate 1 1>;
};
trip1_cpu6 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu6_isolate 1 1>;
};
trip1_cpu7 {
trip = <&pm8195_1_trip1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
pm8195_2_temp_alarm: pm8195_2_tz {
@ -124,6 +184,59 @@
type = "critical";
};
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_2_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_2_trip1>;
cooling-device =
<&CPU0 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip1_cpu1 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu1_isolate 1 1>;
};
trip1_cpu2 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu2_isolate 1 1>;
};
trip1_cpu3 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu3_isolate 1 1>;
};
trip1_cpu4 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu4_isolate 1 1>;
};
trip1_cpu5 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu5_isolate 1 1>;
};
trip1_cpu6 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu6_isolate 1 1>;
};
trip1_cpu7 {
trip = <&pm8195_2_trip1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
pm8195_3_temp_alarm: pm8195_3_tz {
@ -151,5 +264,58 @@
type = "critical";
};
};
cooling-maps {
/*
* trip0 cooling map is dummy node to enable
* passive polling on trip0 violation.
*/
trip0_cpu0 {
trip = <&pm8195_3_trip0>;
cooling-device = <&CPU0 0 0>;
};
trip1_cpu0 {
trip = <&pm8195_3_trip1>;
cooling-device =
<&CPU0 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip1_cpu1 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu1_isolate 1 1>;
};
trip1_cpu2 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu2_isolate 1 1>;
};
trip1_cpu3 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu3_isolate 1 1>;
};
trip1_cpu4 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu4_isolate 1 1>;
};
trip1_cpu5 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu5_isolate 1 1>;
};
trip1_cpu6 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu6_isolate 1 1>;
};
trip1_cpu7 {
trip = <&pm8195_3_trip1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
};

1092
qcom/sa8195-thermal.dtsi Normal file
View file

File diff suppressed because it is too large Load diff

2
qcom/sdmshrike-gpu.dtsi
View file

@ -39,6 +39,8 @@
qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */
#cooling-cells = <2>;
clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
<&gpucc GPU_CC_CXO_CLK>,
<&gcc GCC_DDRSS_GPU_AXI_CLK>,

15
qcom/sdmshrike.dtsi
View file

@ -54,6 +54,7 @@
cache-size = <0x8000>;
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
qcom,lmh-dcvs = <&lmh_dcvs0>;
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
@ -79,7 +80,7 @@
cache-size = <0x8000>;
next-level-cache = <&L2_1>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs0>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
@ -98,7 +99,7 @@
cache-size = <0x8000>;
next-level-cache = <&L2_2>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs0>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
@ -117,7 +118,7 @@
cache-size = <0x8000>;
next-level-cache = <&L2_3>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs0>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
@ -136,6 +137,7 @@
cache-size = <0x20000>;
next-level-cache = <&L2_4>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
qcom,lmh-dcvs = <&lmh_dcvs1>;
#cooling-cells = <2>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
@ -155,7 +157,7 @@
cache-size = <0x20000>;
next-level-cache = <&L2_5>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs1>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x80000>;
@ -174,7 +176,7 @@
cache-size = <0x20000>;
next-level-cache = <&L2_6>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs1>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x80000>;
@ -193,7 +195,7 @@
cache-size = <0x20000>;
next-level-cache = <&L2_7>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
#cooling-cells = <2>;
qcom,lmh-dcvs = <&lmh_dcvs1>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x80000>;
@ -2317,6 +2319,7 @@
#include "sa8195-vidc.dtsi"
#include "sa8155-audio.dtsi"
#include "sm8150-npu.dtsi"
#include "sa8195-thermal.dtsi"
#include "display/sdmshrike-sde-pll.dtsi"
#include "display/sdmshrike-sde.dtsi"