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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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irqchip updates for Linux 5.4
- Large GICv3 updates to support new PPI and SPI ranges - Conver all alloc_fwnode() users to use PAs instead of VAs - Add support for Marvell's MMP3 irqchip - Add support for Amlogic Meson SM1 - Various cleanups and fixes -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl1yLdwPHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpDVHgP+wTAtNzxF4nRsJO3ZlbKe7n2ut7toZvqip7U 97Ll652m/24stioU7b4/Z92E1fWIQe6Bv7u5detNQ4bIg2uwD6ZDYMjLLOXsJXrQ XH7pEAVe2eO0rjZudodUteyPGZQAS1/okY/4qsYNDiWKHi5xQPwMBNJ6fVwOVXUk HG7ClMny1i7SSRm3CGmW3Hxb279DrHOxCGPO6aEX5UQ/uZErCTJN5oFdLfAKvfaU qRpzetq4QOO+L7UBer6+jmtAvA/kuYwpGSnhJXhFOLMSgrGLQbINvYeAyv2vKGvF l6HQNuEf+OQjR5RcUZi6qbAO/WEh2xzmxpqta8COwjBFDcwsITyc5wNRNEfmNqO9 Yrh3/a/J0eWX6X4rmmJkMDEBQvNbyA1//9d5NIjPhIVERZYPa4Z2lb220P4+58r7 xnCqZnxZO78BhUd7HXeCluuTJs83iHxs03nAHysU9YZWkiF7jDXE0d3kla8cGcdY aOaSID0Q52flRxLymWJs29kyXZU8rpiPTbxvi86Ggkvgrj2pSwb8PF8LL4WPkzgh BcuF2ca9oa22OlA3oLV/sKwFRS77en+bpzLeU0NjeAcu5b8AY2nSSYXiuvtxIzi3 FbQCsBBl7i5F5AQT9XGugjeNsCRUsUvIOP4f4w2Ej6HmqJb/SJVMBedMBsjGoEFG sj93Nc7f =PsGr -----END PGP SIGNATURE----- Merge tag 'irqchip-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates for Linux 5.4 from Marc Zyngier: - Large GICv3 updates to support new PPI and SPI ranges - Conver all alloc_fwnode() users to use PAs instead of VAs - Add support for Marvell's MMP3 irqchip - Add support for Amlogic Meson SM1 - Various cleanups and fixes
This commit is contained in:
commit
9cc5b7fba5
24 changed files with 529 additions and 165 deletions
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@ -31,7 +31,7 @@ struct irqchip_fwid {
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struct fwnode_handle fwnode;
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unsigned int type;
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char *name;
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void *data;
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phys_addr_t *pa;
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};
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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@ -62,7 +62,8 @@ EXPORT_SYMBOL_GPL(irqchip_fwnode_ops);
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* domain struct.
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*/
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struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,
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const char *name, void *data)
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const char *name,
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phys_addr_t *pa)
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{
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struct irqchip_fwid *fwid;
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char *n;
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@ -77,7 +78,7 @@ struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,
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n = kasprintf(GFP_KERNEL, "%s-%d", name, id);
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break;
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default:
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n = kasprintf(GFP_KERNEL, "irqchip@%p", data);
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n = kasprintf(GFP_KERNEL, "irqchip@%pa", pa);
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break;
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}
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@ -89,7 +90,7 @@ struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,
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fwid->type = type;
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fwid->name = n;
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fwid->data = data;
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fwid->pa = pa;
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fwid->fwnode.ops = &irqchip_fwnode_ops;
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return &fwid->fwnode;
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}
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@ -148,6 +149,7 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size,
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switch (fwid->type) {
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case IRQCHIP_FWNODE_NAMED:
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case IRQCHIP_FWNODE_NAMED_ID:
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domain->fwnode = fwnode;
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domain->name = kstrdup(fwid->name, GFP_KERNEL);
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if (!domain->name) {
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kfree(domain);
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