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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"A pile of smallish changes all over the place:
- Add a missing ISB in the GIC V1 driver
- Remove an ACPI version check in the GIC V3 ITS driver
- Add the missing irq_pm_shutdown function for BRCMSTB-L2 to avoid
spurious wakeups
- Remove the artifical limitation of ITS instances to the number of
NUMA nodes which prevents utilizing the ITS hardware correctly
- Prevent a infinite parsing loop in the GIC-V3 ITS/MSI code
- Honour the force affinity argument in the GIC-V3 driver which is
required to make perf work correctly
- Correctly report allocation failures in GIC-V2/V3 to avoid using
half allocated and initialized interrupts.
- Fixup checks against nr_cpu_ids in the generic IPI code"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
genirq/ipi: Fixup checks against nr_cpu_ids
genirq: Restore trigger settings in irq_modify_status()
MAINTAINERS: Remove Jason Cooper's irqchip git tree
irqchip/gic-v3-its-platform-msi: Fix msi-parent parsing loop
irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES
irqchip: brcmstb-l2: Define an irq_pm_shutdown function
irqchip/gic: Ensure we have an ISB between ack and ->handle_irq
irqchip/gic-v3-its: Remove ACPICA version check for ACPI NUMA
irqchip/gic-v3: Honor forced affinity setting
irqchip/gic-v3: Report failures in gic_irq_domain_alloc
irqchip/gic-v2: Report failures in gic_irq_domain_alloc
irqchip/atmel-aic: Remove root argument from ->fixup() prototype
irqchip/atmel-aic: Fix unbalanced refcount in aic_common_rtc_irq_fixup()
irqchip/atmel-aic: Fix unbalanced of_node_put() in aic_common_irq_fixup()
This commit is contained in:
commit
9dae41a238
12 changed files with 84 additions and 38 deletions
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@ -1000,7 +1000,7 @@ EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
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void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
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{
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unsigned long flags;
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unsigned long flags, trigger, tmp;
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struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
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if (!desc)
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@ -1014,6 +1014,8 @@ void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
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irq_settings_clr_and_set(desc, clr, set);
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trigger = irqd_get_trigger_type(&desc->irq_data);
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irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
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IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
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if (irq_settings_has_no_balance_set(desc))
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@ -1025,7 +1027,11 @@ void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
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if (irq_settings_is_level(desc))
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irqd_set(&desc->irq_data, IRQD_LEVEL);
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irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
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tmp = irq_settings_get_trigger_mask(desc);
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if (tmp != IRQ_TYPE_NONE)
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trigger = tmp;
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irqd_set(&desc->irq_data, trigger);
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irq_put_desc_unlock(desc, flags);
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}
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@ -165,7 +165,7 @@ irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu)
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struct irq_data *data = irq_get_irq_data(irq);
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struct cpumask *ipimask = data ? irq_data_get_affinity_mask(data) : NULL;
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if (!data || !ipimask || cpu > nr_cpu_ids)
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if (!data || !ipimask || cpu >= nr_cpu_ids)
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return INVALID_HWIRQ;
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if (!cpumask_test_cpu(cpu, ipimask))
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@ -195,7 +195,7 @@ static int ipi_send_verify(struct irq_chip *chip, struct irq_data *data,
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if (!chip->ipi_send_single && !chip->ipi_send_mask)
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return -EINVAL;
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if (cpu > nr_cpu_ids)
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if (cpu >= nr_cpu_ids)
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return -EINVAL;
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if (dest) {
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