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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

Browse source 
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: SH-4A UBC support
  sh: interrupt exception handling rework
  sh: Default enable R7780RP IRQs.
  sh: Zero-out coherent buffer in consistent_alloc().
  sh: Convert IPR-IRQ to IRQ chip.
  sh: Convert INTC2 IRQ handler to irq_chip.
  sh: Fix pr_debug statements for sh4
  sh: Convert r7780rp IRQ handler to IRQ chip.
  sh: Updates for IRQ handler changes.
  sh: Kill off timer_ops get_frequency().
  sh: First step at generic timeofday support.
This commit is contained in:
Linus Torvalds 2006-10-12 08:33:23 -07:00
commit 9eb2007488
32 changed files with 249 additions and 1100 deletions
Download patch file Download diff file Expand all files Collapse all files

37
include/asm-sh/cpu-sh4/ubc.h
View file

@ -3,6 +3,7 @@
*
* Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2003 Paul Mundt
* Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -11,6 +12,41 @@
#ifndef __ASM_CPU_SH4_UBC_H
#define __ASM_CPU_SH4_UBC_H
#if defined(CONFIG_CPU_SH4A)
#define UBC_CBR0 0xff200000
#define UBC_CRR0 0xff200004
#define UBC_CAR0 0xff200008
#define UBC_CAMR0 0xff20000c
#define UBC_CBR1 0xff200020
#define UBC_CRR1 0xff200024
#define UBC_CAR1 0xff200028
#define UBC_CAMR1 0xff20002c
#define UBC_CDR1 0xff200030
#define UBC_CDMR1 0xff200034
#define UBC_CETR1 0xff200038
#define UBC_CCMFR 0xff200600
#define UBC_CBCR 0xff200620
/* CBR */
#define UBC_CBR_AIE (0x01<<30)
#define UBC_CBR_ID_INST (0x01<<4)
#define UBC_CBR_RW_READ (0x01<<1)
#define UBC_CBR_CE (0x01)
#define UBC_CBR_AIV_MASK (0x00FF0000)
#define UBC_CBR_AIV_SHIFT (16)
#define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK)
#define UBC_CBR_INIT 0x20000000
/* CRR */
#define UBC_CRR_RES (0x01<<13)
#define UBC_CRR_PCB (0x01<<1)
#define UBC_CRR_BIE (0x01)
#define UBC_CRR_INIT 0x00002000
#else /* CONFIG_CPU_SH4 */
#define UBC_BARA 0xff200000
#define UBC_BAMRA 0xff200004
#define UBC_BBRA 0xff200008
@ -22,6 +58,7 @@
#define UBC_BDRB 0xff200018
#define UBC_BDMRB 0xff20001c
#define UBC_BRCR 0xff200020
#endif /* CONFIG_CPU_SH4 */
#endif /* __ASM_CPU_SH4_UBC_H */

4
include/asm-sh/hw_irq.h
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@ -1,4 +1,8 @@
#ifndef __ASM_SH_HW_IRQ_H
#define __ASM_SH_HW_IRQ_H
#include <asm/atomic.h>
extern atomic_t irq_err_count;
#endif /* __ASM_SH_HW_IRQ_H */

14
include/asm-sh/irq.h
View file

@ -697,13 +697,15 @@ extern int ipr_irq_demux(int irq);
#define INTC2_INTPRI_OFFSET 0x00
void make_intc2_irq(unsigned int irq,
unsigned int ipr_offset, unsigned int ipr_shift,
unsigned int msk_offset, unsigned int msk_shift,
unsigned int priority);
void init_IRQ_intc2(void);
void intc2_add_clear_irq(int irq, int (*fn)(int));
struct intc2_data {
unsigned short irq;
unsigned char ipr_offset, ipr_shift;
unsigned char msk_offset, msk_shift;
unsigned char priority;
};
void make_intc2_irq(struct intc2_data *);
void init_IRQ_intc2(void);
#endif
extern int shmse_irq_demux(int irq);

1
include/asm-sh/irq_regs.h Normal file
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@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>

13
include/asm-sh/timer.h
View file

@ -8,8 +8,9 @@ struct sys_timer_ops {
int (*init)(void);
int (*start)(void);
int (*stop)(void);
#ifndef CONFIG_GENERIC_TIME
unsigned long (*get_offset)(void);
unsigned long (*get_frequency)(void);
#endif
};
struct sys_timer {
@ -24,21 +25,17 @@ struct sys_timer {
extern struct sys_timer tmu_timer;
extern struct sys_timer *sys_timer;
#ifndef CONFIG_GENERIC_TIME
static inline unsigned long get_timer_offset(void)
{
return sys_timer->ops->get_offset();
}
static inline unsigned long get_timer_frequency(void)
{
return sys_timer->ops->get_frequency();
}
#endif
/* arch/sh/kernel/timers/timer.c */
struct sys_timer *get_sys_timer(void);
/* arch/sh/kernel/time.c */
void handle_timer_tick(struct pt_regs *);
void handle_timer_tick(void);
#endif /* __ASM_SH_TIMER_H */