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mmc: renesas_sdhi_internal_dmac: fix #define RST_RESERVED_BITS

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The DM_CM_RST register actually has bits 0-31 defaulting to 1s and bits
32-63 defaulting to 0s -- fix off-by-one in #define RST_RESERVED_BITS.

Signed-off-by: Sergei Shtylyov <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Fixes: 2a68ea7896 ("mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC")
Cc: [email protected] # v4.14+
Signed-off-by: Ulf Hansson <[email protected]>
This commit is contained in:
Sergei Shtylyov 2018-08-22 21:28:01 +03:00 • committed by Ulf Hansson
commit 9faf870e55
1 changed files with 1 additions and 1 deletions
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2
drivers/mmc/host/renesas_sdhi_internal_dmac.c
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@ -45,7 +45,7 @@
/* DM_CM_RST */
#define RST_DTRANRST1 BIT(9)
#define RST_DTRANRST0 BIT(8)
#define RST_RESERVED_BITS GENMASK_ULL(32, 0)
#define RST_RESERVED_BITS GENMASK_ULL(31, 0)
/* DM_CM_INFO1 and DM_CM_INFO1_MASK */
#define INFO1_CLEAR 0